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A SOFT COMMUTATION CONSTANT HIGH FREQUENCY LINK DC/AC
CONVERTER OPERATING WITH SINUSOIDAL OUTPUT VOLTAGE
Dalton L. R. Vidor, Arnaldo J. Perin
Federal University of Santa Catarina
Dept. of Electrical Engineering
Power Electronics Laboratory
P.O.Box 5 119 - 88040-970 - Florianopolis - SC - Brazil
Phone: 55-482-3 1.9204 - Fax: 55-482-3 1.9770 - E. Mail: [email protected]
Abstract - The purpose of this paper is to introduce and
analyze a high frequency link DC-AC converter for small
power UPS applications, with the following properties:
operation at constant frequency, soft commutation, isolation by
a high frequency transformer, bi-directional power flow
capability, absorption of the parasitic elements in the
commutation process, simple control circuitry, no need to
detect semiconductor conduction state, and low harmonic
distortion at the output voltage.

These properties are achieved with a system composed by a
high frequency ZVS inverter and a high frequency ZCS
cvcloconverter interconnected each other by a high frequency
tiansformer. The output voltage is regulated b; phase-shik
between the two converters.

This converter is controlled in a very simple way by the
phase difference between the two pairs of switches.
One difficulty found in the mentioned circuit is the
commutation of the output converter, when it takes place in a
conventional way, causes switching stress upon the power
semiconductors.
This paper presents a new phase-controlled high frequency
link DC/AC converter with no switching losses neither in the
input converter nor in the output cycloconverter. Furthermore,
a control strategy is described that allows a voltage with low
harmonic distortion.
Such concepts are presented and discussed in the
subsequent sections of the paper.

In addition to the analysis results, experimental results
taken from a laboratory prototype rated at SOOW are also
presented in this paper.

I. INTRODUCTION
Many applications, such as micro-computers, office, and
home electronics equipment, require. small size and
inexpensive UPS’S. Conceiving and designing such systems to
meet size and cost specifications represent a challenge that
most engineers face in the present days.

A simple technique suitable for such applications has been
presented in reference [l], which power circuit is shown in
Fig. 1.

2’ THE

‘IRCmT

AND

OPERATION

OF

The power stage diagram of the proposed converter, which
is a generalization of a D O C converter introduced in [2], is
shown in Fig. 2, where L, represents the transformer
magnetizing inductance and L incorporates the transformer
leakage inductances. The circuit is composed by two stages.
The first one is a half-bridge inverter, switching at constant
frequency with duty-cycle equal to 0.5. This inverter is formed
by E, Q1, Q2, D1, D2, C1, Cz, and L,. It operates at zero
voltage switching thanks to the presence of Lm, C1, and C2.

i

mh7_

T

Fig. 2 - Basic circuit of the DC/AC converter with high
frequency link.

Fig. 1 - Phase-controlled DC/AC converter introduced in
reference [l].
0-7803-1859-5/94/$4.00

Q

1994 IEEE

637

+
The second stage is configured as a cycloconverter,
composed by four bi-directional switches, an input inductor L
and an output capacitive filter. As it is described hereafter, this
stage operates in a discontinuous current mode which implies
that the switches commutate at zero current. The bi-directional
switches are represented by thyristors because they are the
power semiconductors that naturally perform commutation at
zero-current. The load, not represented in Fig. 2 to simplify
the operation description, is connected across the filter
capacitor C.
The operation of the circuit is described as follows, with
the aid of the theoretical waveforms shown in Fig. 3.
Let us assume that a positive current is flowing through the
output capacitor. In this case the positive group of switches of
the cycloconverter is properly activated, which is constituted
by T 1 's and T2k.
Transistors Q1 and Q2 are gated complementary with
duty-cycle equal to 0.5 so that the voltage across a and b is
rectangular as shown in Fig. 3.g. The current that flows
through Lm, also shown in Fig. 3.g, has a triangular shape
and ensures the ZVS of the inverter.
First stage (tl, T/2), Fig. 4.a: at the instant tl, the
semiconductors TI'S are gated on. The current iL start
increasing linearly through E, QI, TI'S, L, and C and
reaches its maximum value when t = T12. It is very
important lo notice that TI'S are closed with no
commutation losses, at zero current.
Second stage (tz), Fig. 4.b: at the instant t2. Q1 is
turned off. The currents iLm plus iL are deviated softly

from Q1 to D2, after charging C1 and discharging C2.
This commutation takes place in a time interval much
lower than the switching period. Therefore, it is assumed
that it does not affect the power transfer to the load.
Besides, during this short interval iL and I L are
~ ~
assumed constant.
Third stage (t2, t3) Fig. 4.c: during this time interval
Vab is negative, as D2 assumes the current i ~ Therefore
.
the current iL start decreasing linearly and reaches zero
when t = t3. During this time interval Q2 is gated on at
both zero voltage and zero current.
Fourth stage (t3, t4) Fig. 4.d: during this stage there
is no current through the switches of the cycloconverter.
The power load is supplied by the output capacitor.
Fifth stage (t4, T): at the instant t = t4, the switches
T2's are gated on. Again, due to the presence of L, the
current increases linearly from zero and the switches
commutate with practically no losses.
In the subsequent stages, the converter operates cyclically
in a similar way. Therefore, they will not be described here.
The corresponding topological states are shown in Fig. 4.
What determines which group of switches of the
cycloconverter is activated is the direction of the current ic
through the capacitor. If ic is to be positive, the positive group
(TI and T2) is activated, whereas as the negative one (T3 and
T4) is gated to get negative current. The output voltage is
regulated by the phase difference between the pulses of the
bridges control, defined by DT in Fig. 3 .

638

-c

b

--

c,

N

N

L?

E

'L
'

A h

r

TI

_-

D 2

N

c--

Fig. 4 - Topological states for a switching period.

3. THEORETICAL
ANALYSIS
(4)

In order to simplify the mathematical analysis of the
converter, the following assumptions are made:

In the time interval A t2 = t3 - t2,the current IL is given

The transformer magnetizing inductance is very large,

.
1

by:

The commutation is instantaneous,

1

All the semiconductors are ideal,

9

The transformer tuns ratio is equal to the unit,

1 The switching frequency is very high in comparison
with the output AC frequency, so that the output voltage
can be assumed constant during a switching period.

The time interval A t2 = t3 - t2 is given by:

To analyze the steady state circuit behavior the following
variables are defined:

2D,
D=--T

-

284
T

A t, = t2 - t,

YJ

9 = x

The output average current is represented by expression
(7).
(2)

At,
I , =I&).(-+-)
T
(3)

Att,

(7)

T

Therefore with expressions (l), ( 3 ) and (4), we obtain:

Where D is defined as the duty-cycle.
During the time interval A tl = tz - t,, the current IL is
given by:
Thus,

639

(9)

Where:

Pa =

E2
2.7r.A.t

Therefore the inductance value must be:

LI
The switching frequency is represented by fs. Expression
(9) represents the DC conversion ratio of the converter in
steady state, over a switching period, which is shown in Fig. 5 .

q.(1-q2).EZ
8.A.L

And the maximum output power is obtained when

q z * m

-

Fig. 5 Output characteristic for the positive group.

The maximum duty-cycle takes place when:

Atl

1

0

0.5

1

-

T
+ At2 = -

Fig. 6 The maximum average instantaneous power
transferred to the load.

2

Using expressions (l), (3), (4), (5) and (1l), the maximum
dutycycle is obtained and given by expression (12).

-0.5

The maximum voltage across the switches of the primary
side converter is equal to E, whereas the switches of the
cycloconverter are subjected by a maximum theoretical voltage
given by expression (17).

The output instantaneous average power in the steady state
operation is given by equation (13) and represented in Fig. 6.

Where n is the transformer turns ratio.
Y

640

4. CONTROL
STRATEGY
The proposed converter must be able to supply power to a
load with low output voltage harmonic distortion. This
requires an appropriate control strategy. In this paper the
control of the instantaneous average output voltage has been
adopted, which scheme is shown in Fig. 7. Vo*is a generated
sinusoidal reference voltage. The amplitude of voltagc Vc at
the output of the PI controller determines the phase delay of
the cycloconverter gate signals by means of DT,while the
polarity of Vc determines which semiconductors group of the
cycloconverter is gated. In other words, DT determines the
value of the cycloconverter output current, whereas Vc
determines whether th~scurrent is positive to supply charge to
the output capacitor, or negative to extract electrical charge
from it.

-

Fig. 8 a) main waveforms of the implemented control and
b) associated phasor diagram, for operation at no load.

F+&

D(wt)<

Controler

I

1k q,, senwt
2

Where w = 2 ?Tf , f is the output €requency and the
signal of qmax depends on the polarity of Vc. It means that

Fig. 7 - Block diagram that represents the implemented
control.

The action of the implemented control strategy can be best
understood with the aid of the waveforms shown in Fig. 8,
which correspond to the operation at no-load. The delay of the
output voltage in comparison to the reference one is
determined solely by the parameters of the PI regulator for
sinusoidal steady-state operation.

5. SOFTCOMMUTATION
CONDITION
The switches Qi's always have soft commutation due to the
principle of the ZVS inverter operation even at no load
conditions at the output of the converter.
However, the switches Ti's have soft commutation only
when the cycloconverter operates in discontinuous current
mode. Thus, it is necessary to respect the maximum duty-cycle
give by expression (12).
Considering now that Vo is an ideal AC voltage. To a
given qmax the duty-cycle must respect the following relation:

the signal is positive during the time interval of conduction of
the switches of the negative group of the cycloconverter and
vice-versa.
The Fig. 9 presents the maximum theoretical duty-cycle in
the output frequency for capacitive, resistive and inductive
load with the converter operating at discontinuous current
mode. We can note that the maximum duty-cycle has different
instantaneous values and depends on the phase (a)of the
load. It is possible to demonstrate that using the maximum
duty-cycle at resistive load D 2 0.5, and at reactive load with

1) ( 0.5 the output power is negative.
To design the converter, it is necessary to respect the
maximum average instantaneous power in the discontinuous
conduction mode, using expression (15) to calculate L. With

J1/3

q5
the converter will operate with a duty-cycle near
to Dmax with a specific load considered in the converter
design operation.
The operation of the converter with a large variation of @
must respect the maximum duty-cycle give by z k @ (Fig. 9)

64 1

or, with a best use of the switches, limiting the duty-cycle only
during the time interval where the output power is negative.

Dmax
Capacitive
Load

__

05

E

Fig. 10 - Power stage diagram of the implemented
laboratory prototype.

-120

I

2r

A

wt

*--,

Time (ms)

Q

Fig. 9 - The maximum duty-cycle for diferents types of load.

6 . RELEVANTEXPERIMENTAL
RESULTS
To verify experimentally the principle of operation and the
validity of the theoretical analysis, a laboratory prototype has
been implemented, whose power stage diagram is shown in
Fig. 10 with the following specifications:
Output Power = 500W
Output Voltage = 95Vrms/60H~
Input Voltage = 70VDC
Switching Frequency = 30KHz
The parameters and components are the following:
q = 0.6

Q I , Q ~ , Q ~ =, Q
MTM45N15
~
T I , T ~ , T ~=, T
~
APT8075
Dl,D2,D3,Dq = APT30D60
3,3nF
C I , C ~ , C ~ =, C
~
C5 = 1OOpF
(.:6 = 20pF - Blocking Capacitor
L,I,L2 = 42pH - Auxiliary resonant inductors
L3 = 300pH - Auxiliary commutation inductor
CO = SpF - Output filter

0

4

8

12

16

20

Time (ms)

Rg 1.I - Relevant waveforms generated experimentally a)
Vo' and output voltage Vo , 6) output of the PI regulator and
polanty of the voltage V,

Tr - Isolatioii high frequency transformer. on a ferrite
core E65/26 (Thornton), with N 1 := 27 Lurns and N2 =
74 turns
R = 1812 - Load resistor
Some relevant waveforms with no output load are shown in
Fig. 11, namely input reference voltage Vo*, output voltage
Vo, voltage V, outputted by the PI regulator, and the polarity
of Vc, obtained by comparing V, with zero.
In Fig. 12 are shown the output voltage and current for
resistive load (R = 1811) where the THD of Vo is equal to
3.4%. In Fig. 13 are shown the output voltage and current for
inductive load (R = 14t-2. L = 28mH) where the THD of Vo is
equal to 4.7% and in Fig. 14 for inductive load (L=lOOmH).

642

Using' the same prototype, without changing the power
stage and the control circuit parameters, a non-linear load (R
= 25R, C = 470pF) was used. The results are showii in Fig. 15
and the THD of Vo is equal to 7.3%. We believe that with a
specific design of the converter to non-linear load, better
results can be obtained. We are still studying the control
strategy to obtain faster response during the transient of the
changes of the groups of the cycloconverter to improve the
output voltage.

160
120
80

40

0
-40
-80

-120
-160

CONCLUSION

Time (ms)

Fig. 12 - Experimental results for resistive load(500W)

In this paper we introduce a new DC/AC converter that
features:
160

I20
80
40
0

-40
-80
-120
-1 60

Time (ms)

Fig 13 - Experimental results for Inductwe (RL)load
(500VA)

160 120.
80.

The proposed converter is intended 10 be used in small
power UPS applications. Its feasibility in medium power
applications could be questioned. because of the high
conduction losses, inherent to the discontinuous current mode
operation. It is our believe, however that with the development
of low conduction voltage drop switches such as the MCT, the
technique discussed above might be extended for larger power
equipment.

41).

0.
-40

.

-80.
-120 -

-160

a) isolation by a high frequency transformer,
b) operation at constant frequency,
c) soft commutation of all switches,
d) reversibility of the power flow,
e) absorption of the parasitic elements of the circuit,
f) no need to detect the conduction state of any switch,
g) very simple control circuit,
h) output voltage with no harmonic distortion even
supplying non-linear loads, and
i) ability to supply power for resistive, inductive,
capacitive. and non-linear loads.
Other than the topological variation shown in Fig. 10 does
exist. Both the inverter and the cycloconverter can be
configured as half-bridge or full-bridge topology, depending
on voltage, current and power levels of a particular
application.

~

Time (ms)

-

Fig. 1 4 Experimental results for inductive load (200VA).

ACKNOWLEDGMENT
The authors wish to thank Prof. Ivo Barbi, Dr. lng., for his
expressive technical contributions and discussions during the
final part of the research.

160

120

80

REFERENCES

40

0

[I] - K. Harada, H. Sakamoto and M. Shoyama - "Phase
Controlled DC/AC Converter with High Frequency
Switching" IEEE - PESC Record, 1987, pp. 13-19.
[ 2 ] - A. J. Perin and I. Barbi - "A New [solated HalfBridge Soft-Switching Pulse-Width Modulated DC-DC
Converter" IEEE - APEC Record, 1992, pp. 66-72

-40

-80

12- 1 6 ' Time (ms)

Fig. 15

-

__
20

Experimental results for non h e a r load (500w)

643

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