Dominance

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Fault equivalent & collapsing
Combinational circuits
• faults f and g are equivalent iff Zf(x) = Zg(x)
• equivalent faults are not distinguishable
For gate with controlling value c and inversion i :
all input sac faults and output sa(c ⊕ i) faults are
equivalent

1

Equivalence Rules

Equivalence
Equivalence Example
Example
sa0 sa1

Faults in red
removed by
equivalence
collapsing

sa0 sa1

sa0 sa1

sa0 sa1
AND

sa0 sa1

OR

sa0 sa1

WIRE/BUFFER
sa0
sa0
sa1
sa1

NAND
sa0 sa1

sa0 sa1

sa0 sa1
NOR

sa0 sa1

sa0 sa1

sa0 sa1
sa0 sa1

INVERTER
sa0
NOT
sa1

sa0 sa1

sa0 sa1
sa0 sa1

sa0 sa1

sa0 sa1

sa0 sa1

sa0
sa1
FANOUT

sa0 sa1

sa0 sa1
sa0 sa1

sa1
sa0
sa0 sa1

sa0
sa1

Fault
Fault Dominance
Dominance
• If all tests of some fault F1 detect another fault F2, then
F2 is said to dominate F1.
• Dominance fault collapsing: If fault F2 dominates F1,
then F2 is removed from the fault list.
• When dominance fault collapsing is used, it is sufficient
to consider only the input faultsof Boolean gates.
• In a tree circuit (without fanouts) PI faults form a
dominance collapsed fault set.

sa0 sa1
sa0 sa1

sa0
sa1

sa0 sa1
sa0 sa1
sa0 sa1
Collapse ratio =

32

= 0.625

Fault dominace
Combinational circuits
if f dominates g => any test that detects g
will also detect f . Therefore , only
dominating faults must be detected

x
y

Example :
[x, y] is the only test to deleted
f1 = y sa1, since it detects
f2 = z sa0 => f2 dominates

z

Dominance
Dominance Example
Example

Fault dominance & collapsing
For gate with controlling value c &
inversion i, the output sa(c’⊕i)
dominates any input sac’
sequential circuits
dominance fault collapsing is not useful

20

F1
s-a-1

All tests of F2
F2
s-a-1

110
101

s-a-1
s-a-1

001
000

010
011

100
Only test of F1

s-a-1
s-a-0
A dominance collapsed fault set
(after equivalence collapsing)

2

Equivalent to sa1 at the input

in dominance fault collapsing
it is sufficient to consider only
the input faults

Equivalent to sa0 at the input

3

Checkpoint
Checkpoint Theorem
Theorem
• Primary inputs and fanout branches of a combinational circuit
are called checkpoints.
• Checkpoint theorem: A test set that detects all single
(multiple) stuck-at faults on all checkpoints of a
combinational circuit, also detects all single (multiple) stuckat faults in that circuit.
Total fault sites = 16
Checkpoints ( ) = 10

4

5

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