1.Determine the decimal value of each of the following unsigned binary numbers:
2.Determine the decimal value of each of the following signed binary number displayed in the 2’s complement form:
3. Determine the outputs (Cout, Sout) of a full-adder for each of the following inputs:
4.The circuit below is an attempt to build a half-adder. Will the Cout and Sout function properly? Demonstrate your rationale.
5.Determine the outputs for the circuit shown below. Assume that C0 = 0 for all cases.
6.Write the VHDL text for the 2-bit magnitude comparator shown below.
7.Write the VHDL text file for a 2-bit full-adder using BIT types.
8.Write the VHDL text file for a 2-bit full-adder using INTEGER types.
9.Develop the VHDL text file for a 4 state, 8-bit arithmetic and logic unit (ALU). The ALU inputs 2 8-bit numbers (A and B) and output an 8-bit result (Y) as shown in the table. (2 points).
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1.Determine the decimal value of each of the following unsigned binary numbers:
2.Determine the decimal value of each of the following signed binary number displayed in the 2’s complement form:
3. Determine the outputs (Cout, Sout) of a full-adder for each of the following inputs:
4.The circuit below is an attempt to build a half-adder. Will the Cout and Sout function properly? Demonstrate your rationale.
5.Determine the outputs for the circuit shown below. Assume that C0 = 0 for all cases.
6.Write the VHDL text for the 2-bit magnitude comparator shown below.
7.Write the VHDL text file for a 2-bit full-adder using BIT types.
8.Write the VHDL text file for a 2-bit full-adder using INTEGER types.
9.Develop the VHDL text file for a 4 state, 8-bit arithmetic and logic unit (ALU). The ALU inputs 2 8-bit numbers (A and B) and output an 8-bit result (Y) as shown in the table. (2 points).