iLab 3 of 6: Flip-Flops in VHDL (30 points)
Note!
Submit your assignment to the Dropbox, located at the top of this page.
(See the Syllabus section "Due Dates for Assignments & Exams" for due dates.)
iLAB OVERVIEW
Scenario/Summary
This week, we investigate flip-flops. This iLab uses Quartus II to simulate flip-flop operation with VHDL text entry. After the simulations, actual J-K flip-flop circuits are studied to verify that the simulations are accurate.
Deliverables
For this iLab, the deliverables include the laboratory cover sheet, observations/measurements, answers to the questions, the VHDL simulation for the D flip-flop, and the VHDL text file and simulation for the J-K flip-flop. The cover sheet must be completed in a typed format.
Required Software
QUARTUS II
Access the software at https://lab.devry.edu.
iLAB STEPS
STEP 1: Download the lab.
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Download iLab Procedures and the iLab Cover Sheets (also located in Doc Sharing) and save them to your PC.
STEP 2: Simulate the D flip-flop operation.
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In Part A, create, compile, and simulate the VHDL file of the 74LS74D flip-flop. Submit the simulation with your report.
STEP 3: Simulate the J-K flip-flop operation.
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In Part B create, compile, and simulate the operation of the 74LS112 flip-flop. Submit the text file and simulation with your report.
STEP 4: Prototype the J-K flip-flop operation.
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In Part C, prototype and test the operation of the 74LS112 flip-flop. Submit the measurements and pictures (online) with your report.
STEP 5: Answer the questions.
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There are four questions that must be answered in this iLab.
STEP 6: Complete the Cover Sheet.
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Type the required information onto the Cover Sheet.
STEP 7: Submit your deliverables.
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Submit the Quartus II text file and simulation and the Cover Sheet, Observations/Measurements, and Question pages only. Online students—please attach pictures of breadboard and ESOC.
See the Syllabus section "Due Dates for Assignments & Exams" for due date information.
Comments
Content
iLab 3 of 6: Flip-Flops in VHDL (30 points)
Note!
Submit your assignment to the Dropbox, located at the top of this page.
(See the Syllabus section "Due Dates for Assignments & Exams" for due dates.)
iLAB OVERVIEW
Scenario/Summary
This week, we investigate flip-flops. This iLab uses Quartus II to simulate flip-flop operation with VHDL text entry. After the simulations, actual J-K flip-flop circuits are studied to verify that the simulations are accurate.
Deliverables
For this iLab, the deliverables include the laboratory cover sheet, observations/measurements, answers to the questions, the VHDL simulation for the D flip-flop, and the VHDL text file and simulation for the J-K flip-flop. The cover sheet must be completed in a typed format.
Required Software
QUARTUS II
Access the software at https://lab.devry.edu.
iLAB STEPS
STEP 1: Download the lab.
Back to Top
Download iLab Procedures and the iLab Cover Sheets (also located in Doc Sharing) and save them to your PC.
STEP 2: Simulate the D flip-flop operation.
Back to Top
In Part A, create, compile, and simulate the VHDL file of the 74LS74D flip-flop. Submit the simulation with your report.
STEP 3: Simulate the J-K flip-flop operation.
Back to Top
In Part B create, compile, and simulate the operation of the 74LS112 flip-flop. Submit the text file and simulation with your report.
STEP 4: Prototype the J-K flip-flop operation.
Back to Top
In Part C, prototype and test the operation of the 74LS112 flip-flop. Submit the measurements and pictures (online) with your report.
STEP 5: Answer the questions.
Back to Top
There are four questions that must be answered in this iLab.
STEP 6: Complete the Cover Sheet.
Back to Top
Type the required information onto the Cover Sheet.
STEP 7: Submit your deliverables.
Back to Top
Submit the Quartus II text file and simulation and the Cover Sheet, Observations/Measurements, and Question pages only. Online students—please attach pictures of breadboard and ESOC.
See the Syllabus section "Due Dates for Assignments & Exams" for due date information.