Gsm Based Home Security System

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Gsm Based Home Security System

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DEVELOPMENT OF ADVANCED EMBEDDED SYSTEM FOR HOME SECURITY USING GSM

ABSTRACT 1

Home security system, which provide the security for homes. In this project we are going to develop an embedded system, which will protect the home from fire accidents and thefts through GSM communication.

In this project we are using 8051 based microcontroller for provide the security to homes. GSM modem is used to communicate and respond to the remote commands and those commands are sent to thecontroller. In this we are also going to develop a embedded security system which will detect theft, fire and inform to the owner of house, over wireless medium. The security system will use GSM interface to inform the authorized person, the embedded system will also inform local fire station as well as local police. The authorized person can also alert the known people.
SOFTWARE: Embedded ‘C’ TOOLS: Small Device Cross Compiler & Keil uvision3. TARGET DEVICE: 8051 Microcontroller APPLICATIONS: Home and office appliances. ADVANTAGES: Low cost, automated operation, Low Power consumption. REFERENCE: The 8051 micro controller and embedded systems by Mazidi.

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Chapter 1 Introduction to Embedded Systems

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INTRODUCTION TO EMBEDDED SYSTEMS

EMBEDDED SYSTEM An embedded system is a special-purpose computer system designed to perform one or a few dedicated functions, sometimes with real-time computing constraints. It is usually embedded as part of a complete device including hardware and mechanical parts. In contrast, a general-purpose computer, such as a personal computer, can do many different tasks depending on programming. Embedded systems have become very important today as they control many of the common devices we use. Since the embedded system is dedicated to specific tasks, design engineers can optimize it, reducing the size and cost of the product, or increasing the reliability and performance. Some embedded systems are mass-produced, benefiting from economies of scale. Physically, embedded systems range from portable devices such as digital watches and MP3 players, to large stationary installations like traffic lights, factory controllers, or the systems controlling nuclear power plants. Complexity varies from low, with a single microcontroller chip, to very high with multiple units, peripherals and networks mounted inside a large chassis or enclosure. In general, "embedded system" is not an exactly defined term, as many systems have some element of programmability. For example, Handheld computers share some elements with embedded systems — such as the operating systems and microprocessors which power them — but are not truly embedded systems, because

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they allow different applications to be loaded and peripherals to be connected. An embedded system is some combination of computer hardware and software, either fixed in capability or programmable, that is specifically designed for a particular kind of application device. Industrial machines, automobiles, medical equipment, cameras, household appliances, airplanes, vending machines, and toys (as well as the more obvious cellular phone and PDA) are among the myriad possible hosts of an embedded system. Embedded systems that are programmable are provided with a programming interface, and embedded systems programming is a specialized occupation. Certain operating systems or language platforms are tailored for the embedded market, such as Embedded Java and Windows XP Embedded. However, some low-end consumer products use very inexpensive microprocessors and limited storage, with the application and operating system both part of a single program. The program is written permanently into the system's memory in this case, rather than being loaded into RAM (random access memory), as programs on a personal computer are. APPLICATIONS OF EMBEDDED SYSTEM We are living in the Embedded World. You are surrounded with many embedded products and your daily life largely depends on the proper functioning of these gadgets. Television, Radio, CD player of your living room, Washing Machine or Microwave Oven in your kitchen, Card readers, Access Controllers, Palm devices of your work space enable you to do many of your tasks very effectively. Apart from all these, many controllers embedded in your car take care of
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car operations between the bumpers and most of the times you tend to ignore all these controllers.

In recent days, you are showered with variety of information about these embedded controllers in many places. All kinds of magazines and journals regularly dish out details about latest technologies, new devices; fast applications which make you believe that your basic survival is controlled by these embedded products. Now you can agree to the fact that these embedded products have successfully invaded into our world. You must be wondering about these embedded controllers or systems. What is this Embedded System? The computer you use to compose your mails, or create a document or analyze the database is known as the standard desktop computer. These desktop computers are manufactured to serve many purposes and applications. You need to install the relevant software to get the required processing facility. So, these desktop computers can do many things. In contrast, embedded controllers carryout a specific work for which they are designed. Most of the time, engineers design these embedded controllers with a specific goal in mind. So these controllers cannot be used in any other place. Theoretically, an embedded controller is a combination of a piece of microprocessor based hardware and the suitable software to undertake a specific task. These days designers have many choices in

microprocessors/microcontrollers. Especially, in 8 bit and 32 bit, the available variety really may overwhelm even an experienced
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designer. Selecting a right microprocessor may turn out as a most difficult first step and it is getting complicated as new devices continue to pop-up very often. In the 8 bit segment, the most popular and used architecture is Intel's 8031. Market acceptance of this particular family has driven many semiconductor manufacturers to develop something new based on this particular architecture. Even after 25 years of existence, semiconductor manufacturers still come out with some kind of device using this 8031 core.  Military and aerospace software applications From in-orbit embedded systems to jumbo jets to vital battlefield networks, designers of mission-critical aerospace and defense systems requiring real-time performance, scalability, and highavailability facilities consistently turn to the LynxOS® RTOS and the LynxOS-178 RTOS for software certification to DO-178B. Rich in system resources and networking services, LynxOS provides an off-the-shelf software platform with hard real-time response backed by powerful distributed computing (CORBA), high reliability, software certification, and long-term support options. The LynxOS-178 RTOS for software certification, based on the RTCA DO-178B standard, assists developers in gaining certification for their mission- and safety-critical systems. Real-time systems programmers get a boost with LynuxWorks' DO-178B RTOS training courses. LynxOS-178 is the first DO-178B and EUROCAE/ED-12B

certifiable, POSIX®-compatible RTOS solution.

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Communications applications "Five-nines" availability, CompactPCI hot swap support, and hard real-time response—LynxOS delivers on these key requirements and more for today's carrier-class systems. Scalable kernel configurations, distributed computing capabilities, integrated

communications stacks, and fault-management facilities make LynxOS the ideal choice for companies looking for a single operating system for all embedded telecommunications applications—from complex central controllers to simple line/trunk cards. LynuxWorks Jumpstart for Communications package enables OEMs to rapidly develop mission-critical communications equipment, with pre-integrated, state-of-the-art, data networking and porting software components—including source code for easy customization. The Lynx Certifiable Stack (LCS) is a secure TCP/IP protocol stack designed especially for applications where standards certification is required.  Electronics applications and consumer devices As the number of powerful embedded processors in consumer devices continues to rise, the BlueCat® Linux® operating system provides a highly reliable and royalty-free option for systems designers. And as the wireless appliance revolution rolls on, web-enabled navigation systems, radios, personal communication devices, phones and PDAs all benefit from the cost-effective dependability, proven stability and full product life-cycle support opportunities associated with BlueCat embedded Linux. BlueCat has teamed up
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with industry leaders to make it easier to build Linux mobile phones with Java integration. For makers of low-cost consumer electronic devices who wish to integrate the LynxOS real-time operating system into their products, we offer special MSRP-based pricing to reduce royalty fees to a negligible portion of the device's MSRP.  Industrial automation and process control software Designers of industrial and process control systems know from experience that LynuxWorks operating systems provide the security and reliability that their industrial applications require. From ISO 9001 certification to fault-tolerance, POSIX

conformance, secure partitioning and high availability, we've got it all. Take advantage of our 20 years of experience. MICROCONTROLLER VERSUS MICROPROCESSOR What is the difference between a Microprocessor and

Microcontroller? By microprocessor is meant the general purpose Microprocessors such as Intel's X86 family (8086, 80286, 80386, 80486, and the Pentium) or Motorola's 680X0 family (68000, 68010, 68020, 68030, 68040, etc). These microprocessors contain no RAM, no ROM, and no I/O ports on the chip itself. For this reason, they are commonly referred to as general-purpose Microprocessors. A system designer using a general-purpose microprocessor such as the Pentium or the 68040 must add RAM, ROM, I/O ports, and timers externally to make them functional. Although the addition of external RAM, ROM, and I/O ports makes these systems bulkier and much more expensive, they have the advantage of
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versatility such that the designer can decide on the amount of RAM, ROM and I/O ports needed to fit the task at hand. This is not the case with Microcontrollers.

A Microcontroller has a CPU (a microprocessor) in addition to a fixed amount of RAM, ROM, I/O ports, and a timer all on a single chip. In other words, the processor, the RAM, ROM, I/O ports and the timer are all embedded together on one chip; therefore, the designer cannot add any external memory, I/O ports, or timer to it. The fixed amount of on-chip ROM, RAM, and number of I/O ports in Microcontrollers makes them ideal for many applications in which cost and space are critical. In many applications, for example a TV remote control, there is no need for the computing power of a 486 or even an 8086 microprocessor. These applications most often require some I/O operations to read signals and turn on and off certain bits.

MICROCONTROLLERS FOR EMBEDDED SYSTEMS In the Literature discussing microprocessors, we often see the term Embedded System. Microprocessors and Microcontrollers are widely used in embedded system products. An embedded system product uses a microprocessor (or Microcontroller) to do one task only. A printer is an example of embedded system since the processor inside it performs one task only; namely getting the data and printing it. Contrast this with a Pentium based PC. A PC can be used for any number of applications such as word processor, printserver, bank teller terminal, Video game, network server, or Internet terminal. Software for a variety of applications can be loaded and
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run. Of course the reason a pc can perform myriad tasks is that it has RAM memory and an operating system that loads the application software into RAM memory and lets the CPU run it. In an Embedded system, there is only one application software that is typically burned into ROM. An x86 PC contains or is connected to various embedded products such as keyboard, printer, modem, disk controller, sound card, CD-ROM drives, mouse, and so on. Each one of these peripherals has a Microcontroller inside it that performs only one task. For example, inside every mouse there is a Microcontroller to perform the task of finding the mouse position and sending it to the PC. Table 1-1 lists some embedded products.

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AT89S52 MICROCONTROLLERS

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AT89S52

Features
• Compatible with MCS®-51 Products • 8K Bytes of In-System Programmable (ISP) Flash Memory – Endurance: 10,000 Write/Erase Cycles • 4.0V to 5.5V Operating Range • Fully Static Operation: 0 Hz to 33 MHz • Three-level Program Memory Lock • 256 x 8-bit Internal RAM • 32 Programmable I/O Lines • Three 16-bit Timer/Counters • Eight Interrupt Sources • Full Duplex UART Serial Channel • Low-power Idle and Power-down Modes • Interrupt Recovery from Power-down Mode • Watchdog Timer • Dual Data Pointer • Power-off Flag • Fast Programming Time • Flexible ISP Programming (Byte and Page Mode) • Green (Pb/Halide-free) Packaging Option

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Description The AT89S52 is a low-power, high-performance CMOS 8-bit

microcontroller with 8K bytes of in-system programmable Flash memory. The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the indus-try-standard 80C51 instruction set and pinout. The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional nonvolatile memory pro-grammer. By combining a versatile 8-bit CPU with in-system programmable Flash on a monolithic chip, the Atmel AT89S52 is a powerful microcontroller which provides a highly-flexible and costeffective solution to many embedded control applications. The AT89S52 provides the following standard features: 8K bytes of Flash, 256 bytes of RAM, 32 I/O lines, Watchdog timer, two data pointers, three 16-bit timer/counters, a six-vector two-level interrupt architecture, a full duplex serial port, on-chip oscillator, and clock circuitry. In addition, the AT89S52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. The Idle Mode stops the CPU while allowing the RAM, timer/counters, serial port, and interrupt system to continue functioning. The Power-down mode saves the RAM con-tents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset.

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Block Diagram

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Pin ConfigurationsPin Configurations

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Pin Description VCC Supply voltage. GND Ground. Port 0 Port 0 is an 8-bit open drain bidirectional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-impedance inputs. Port 0 can also be configured to be the multiplexed low-order address/data bus during accesses to external program and data memory. In this mode, P0 has internal pull-ups. Port 0 also receives the code bytes during Flash programming and outputs the code bytes dur-ing program verification. External pull-ups are required during program verification. Port 1 Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled high by the inter-nal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. In addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input (P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as shown in the follow-ing table. Port 1 also receives the low-order address bytes during Flash programming and verification.

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Port 2 Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high by the inter-nal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 2 emits the highorder address byte during fetches from external program memory and dur-ing accesses to external data memory that use 16-bit addresses (MOVX @ DPTR). In this application, Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external data memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash program-ming and verification. Port Pin Alternate Functions P1.0 T2 (external count input to Timer/Counter 2), clock-out P1.1 T2EX (Timer/Counter 2 capture/reload trigger and direction control) P1.5 MOSI (used for In-System Programming) P1.6 MISO (used for In-System Programming) P1.7 SCK (used for In-System Programming)5 1919D– MICRO–6/ Port 3 Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the inter-nal pull-ups and can be used as 18

inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pull-ups. Port 3 receives some control signals for Flash programming and verification. Port 3 also serves the functions of various special features of the AT89S52, as shown in the following table.

RST Reset input. A high on this pin for two machine cycles while the oscillator is running resets the device. This pin drives high for 98 oscillator periods after the Watchdog times out. The DISRTO bit in SFR AUXR (address 8EH) can be used to disable this feature. In the default state of bit DISRTO, the RESET HIGH out feature is enabled. ALE/PROG Address Latch Enable (ALE) is an output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped dur-ing each access to external data memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC 19

instruction. Otherwise, the pin is weakly pulled high. Setting the ALEdisable bit has no effect if the microcontroller is in external execution mode PSEN Program Store Enable (PSEN) is the read strobe to external program memory. When the AT89S52 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to exter-nal data memory. EA/VPP External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming. XTAL1 Input to the inverting oscillator amplifier and input to the internal clock operating circuit. XTAL2 Output from the inverting oscillator amplifier.

Special Function Registers A map of the on-chip memory area called the Special Function Register (SFR) space is shown in Table 5-1. Note that not all of the addresses are occupied, and unoccupied addresses may not be imple-mented on the chip. Read accesses to these addresses will in general return random data, and write accesses will have an indeterminate effect. User software 20

should not write 1s to these unlisted locations, since they may be used in future products to invoke new features. In that case, the reset or inactive values of the new bits will always be 0. Timer 2 Registers: Control and status bits are contained in registers T2CON (shown in Table 5- 2) and T2MOD (shown in Table 10-2) for Timer 2. The register pair (RCAP2H, RCAP2L) are the Capture/Reload registers for Timer 2 in 16-bit capture mode or 16-bit auto-reload mode. Interrupt Registers: The individual interrupt enable bits are in the IE register. Two priorities can be set for each of the six interrupt sources in the IP register.

Memory Organization MCS-51 devices have a separate address space for Program and Data Memory. Up to 64K bytes each of external Program and Data Memory can be addressed. Program Memory If the EA pin is connected to GND, all program fetches are directed to external memory. On the AT89S52, if EA is connected to VCC, program fetches to addresses 0000H through 1FFFH are directed to internal memory and fetches to addresses 2000H through FFFFH are to external memory. Data Memory The AT89S52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a parallel address space to the Special Function Registers. This means that the upper 128 bytes have the same addresses as the SFR space but are physically separate from SFR space. When an instruction accesses an internal location above address 7FH, the address mode used in the instruction specifies whether the CPU accesses the upper 128 bytes 21

of RAM or the SFR space. Instructions which use direct addressing access the SFR space. For example, the following direct addressing instruction accesses the SFR at location 0A0H (which is P2). MOV 0A0H, #data Instructions that use indirect addressing access the upper 128 bytes of RAM. For example, the following indirect addressing instruction, where R0 contains 0A0H, accesses the data byte at address 0A0H, rather than P2 (whose address is 0A0H). MOV @R0, #data Note that stack operations are examples of indirect addressing, so the upper 128 bytes of data RAM are available as stack space. Watchdog Timer (One-time Enabled with Reset-out) The WDT is intended as a recovery method in situations where the CPU may be subjected to software upsets. The WDT consists of a 14-bit counter and the Watchdog Timer Reset (WDTRST) SFR. The WDT is defaulted to disable from exiting reset. To enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register (SFR location 0A6H). When the WDT is enabled, it will increment every machine cycle while the oscillator is running. The WDT timeout period is dependent on the external clock frequency. There is no way to disable the WDT except through reset (either hardware reset or WDT overflow reset). When WDT over-flows, it will drive an output RESET HIGH pulse at the RST pin. Using the WDT To enable the WDT, a user must write 01EH and 0E1H in sequence to the WDTRST register (SFR location 0A6H). When the WDT is enabled, the user needs to service it by writing 01EH and 0E1H to WDTRST to avoid a WDT overflow. The 14-bit counter overflows when it reaches 16383 (3FFFH), and this will reset the device. When the WDT is enabled, it will increment every machine cycle while the oscillator is running. This means the user must reset the WDT at least every 16383 machine cycles. To reset the WDT the user must write 01EH and 0E1H to WDTRST. WDTRST is a writeonly register. The WDT counter cannot be read or written. WhenWDT overflows, it will generate an output RESET pulse at the RST pin. The 22

RESET pulse dura-tion is 98xTOSC, where TOSC = 1/FOSC. To make the best use of the WDT, it should be serviced in those sections of code that will periodically be executed within the time required to prevent a WDT reset.

WDT During Power-down and Idle In Power-down mode the oscillator stops, which means the WDT also stops. While in Power-down mode, the user does not need to service the WDT. There are two methods of exiting Power-down mode: by a hardware reset or via a level-activated external interrupt which is enabled prior to entering Power-down mode. When Power-down is exited with hardware reset, servicing the WDT should occur as it normally does whenever the AT89S52 is reset. Exiting Power-down with an interrupt is significantly different. The interrupt is held low long enough for the oscillator to stabilize. When the interrupt is brought high, the interrupt is serviced. To prevent the WDT from resetting the device while the interrupt pin is held low, the WDT is not started until the interrupt is pulled high. It is suggested that the WDT be reset during the interrupt service for the interrupt used to exit Power-down mode. To ensure that the WDT does not overflow within a few states of exiting Power-down, it is best to reset the WDT just before entering Power-down mode. Before going into the IDLE mode, the WDIDLE bit in SFR AUXR is used to determine whether the WDT continues to count if enabled. The WDT keeps counting during IDLE (WDIDLE bit = 0) as the default state. To prevent the WDT from resetting the AT89S52 while in IDLE mode, the user should always set up a timer that will periodically exit IDLE, service the WDT, and reenter IDLE mode. With WDIDLE bit enabled, the WDT will stop to count in IDLE mode and resumes the count upon exit from IDLE. UART

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The UART in the AT89S52 operates the same way as the UART in the AT89S52 and AT89C52. Timer 0 and 1 Timer 0 and Timer 1 in the AT89S52 operate the same way as Timer 0 and Timer 1 in the AT89S52 and AT89C52. Timer 2 Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter. The type of operation is selected by bit C/T2 in the SFR T2CON (shown in Table 5-2). Timer 2 has three operating modes: capture, auto-reload (up or down counting), and baud rate generator. The modes are selected by bits in T2CON, as shown in Table 10-1. Timer 2 consists of two 8-bit registers, TH2 and TL2. In the Timer function, the TL2 register is incremented every machine cycle. Since a machine cycle consists of 12 oscillator periods, the count rate is 1/12 of the oscil-lator frequency.

In the Counter function, the register is incremented in response to a 1-to-0 transition at its corre-sponding external input pin, T2. In this function, the external input is sampled during S5P2 of every machine cycle. When the samples show a high in one cycle and a low in the next cycle, the count is incremented. The new count value appears in the register during S3P1 of the cycle following the one in which the transition was detected. Since two machine cycles (24 oscillator periods) are required to recognize a 1-to-0 24

transition, the maximum count rate is 1/24 of the oscillator frequency. To ensure that a given level is sampled at least once before it changes, the level should be held for at least one full machine cycle. Capture Mode In the capture mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 is a 16-bit timer or counter which upon overflow sets bit TF2 in T2CON. This bit can then be used to generate an interrupt. If EXEN2 = 1, Timer 2 performs the same operation, but a 1-to-0 transi-tion at external input T2EX also causes the current value in TH2 and TL2 to be captured into RCAP2H and RCAP2L, respectively. In addition, the transition at T2EX causes bit EXF2 in T2CON to be set. The EXF2 bit, like TF2, can generate an interrupt. The capture mode is illus-trated in Figure 10-1. Auto-reload (Up or Down Counter) Timer 2 can be programmed to count up or down when configured in its 16-bit auto-reload mode. This feature is invoked by the DCEN (Down Counter Enable) bit located in the SFR T2MOD (see Table 10-2). Upon reset, the DCEN bit is set to 0 so that timer 2 will default to count up. When DCEN is set, Timer 2 can count up or down, depending on the value of the T2EX pin.

Baud Rate Generator Timer 2 is selected as the baud rate generator by setting TCLK and/or RCLK in T2CON (Table 5-2). Note that the baud rates for transmit and receive can be different if Timer 2 is used for the receiver or transmitter and Timer 1 is used for the other function. Setting RCLK and/or TCLK puts Timer 2 into its baud rate generator mode, as shown in Figure 11-1. The baud rate generator mode is similar to the auto-reload mode, in that a rollover in TH2 causes the Timer 2 registers to be reloaded with the 16-bit value in registers RCAP2H and RCAP2L, which are preset by software. The baud rates in Modes 1 and 3 are determined by Timer 2’s overflow rate 25

according to the fol-lowing equation. The Timer can be configured for either timer or counter operation. In most applications, it is con-figured for timer operation (CP/T2 = 0). The timer operation is different for Timer 2 when it is used as a baud rate generator. Normally, as a timer, it increments every machine cycle (at 1/12 the oscillator frequency). As a baud rate generator, however, it increments every state time (at 1/2 the oscillator frequency). The baud rate formula is given below. where (RCAP2H, RCAP2L) is the content of RCAP2H and RCAP2L taken as a 16-bit unsigned integer. Timer 2 as a baud rate generator is shown in Figure 111. This figure is valid only if RCLK or TCLK = 1 in T2CON. Note that a rollover in TH2 does not set TF2 and will not generate an inter-rupt. Note too, that if EXEN2 is set, a 1-to-0 transition in T2EX will set EXF2 but will not cause a reload from (RCAP2H, RCAP2L) to (TH2, TL2). Thus, when Timer 2 is in use as a baud rate generator, T2EX can be used as an extra external interrupt. Note that when Timer 2 is running (TR2 = 1) as a timer in the baud rate generator mode, TH2 or TL2 should not be read from or written to. Under these conditions, the Timer is incremented every state time, and the results of a read or write may not be accurate. The RCAP2 registers may be read but should not be written to, because a write might overlap a reload and cause write and/or reload errors. The timer should be turned off (clear TR2) before accessing the Timer 2 or RCAP2 registers.

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Programmable Clock Out A 50% duty cycle clock can be programmed to come out on P1.0, as shown in Figure 12-1. This pin, besides being a regular I/O pin, has two alternate functions. It can be programmed to input the external clock for Timer/Counter 2 or to output a 50% duty cycle clock ranging from 61 Hz to 4 MHz (for a 16-MHz operating frequency). To configure the Timer/Counter 2 as a clock generator, bit C/T2 (T2CON.1) must be cleared and bit T2OE (T2MOD.1) must be set. Bit TR2 (T2CON.2) starts and stops the timer. The clock-out frequency depends on the oscillator frequency and the reload value of Timer 2 capture registers (RCAP2H, RCAP2L), as shown in the following equation. In the clock-out mode, Timer 2 roll-overs will not generate an interrupt. This behavior is similar to when Timer 2 is used as a baud-rate generator. It is possible to use Timer 2 as a baud-rate gen-erator and a clock generator simultaneously. Note, however, that the baud-rate and clock-out frequencies cannot be determined independently from one another since they both use RCAP2H and RCAP2L 27

Interrupts The AT89S52 has a total of six interrupt vectors: two external interrupts (INT0 and INT1), three timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. These interrupts are all shown in Figure 13-1. Each of these interrupt sources can be individually enabled or disabled by setting or clearing a bit in Special Function Register IE. IE also contains a global disable bit, EA, which disables all interrupts at once. Note that Table 13-1 shows that bit position IE.6 is unimplemented. User software should not write a 1 to this bit position, since it may be used in future AT89 products. Timer 2 interrupt is generated by the logical OR of bits TF2 and EXF2 in register T2CON. Nei-ther of these flags is cleared by hardware when the service routine is vectored to. In fact, the service routine may have to determine whether it was TF2 or EXF2 that generated the interrupt, and that bit will have to be cleared in software. The Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in which the timers overflow. The values are then polled by the circuitry in the next cycle. However, the Timer 2 flag, TF2, is set at S2P2 and is polled in the same cycle in which the timer overflows. 28

Oscillator Characteristics XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier that can be configured for use as an on-chip oscillator, as shown in Figure 16-1. Either a quartz crystal or ceramic resonator may be used. To drive the device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven, as shown in Figure 16-2. There are no requirements on the duty cycle of the external clock signal, since the input to the internal clock-ing circuitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed. Idle Mode In idle mode, the CPU puts itself to sleep while all the on-chip peripherals remain active. The mode is invoked by software. The content of the onchip RAM and all the special functions regis-ters remain unchanged during this mode. The idle mode can be terminated by any enabled interrupt or by a hardware reset. Note that when idle mode is terminated by a hardware reset, the device normally resumes pro-gram execution from 29

where it left off, up to two machine cycles before the internal reset algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a port pin when idle mode is terminated by a reset, the instruction following the one that invokes idle mode should not write to a port pin or to external memory Power-down Mode In the Power-down mode, the oscillator is stopped, and the instruction that invokes Power-down is the last instruction executed. The on-chip RAM and Special Function Registers retain their values until the Power-down mode is terminated. Exit from Power-down mode can be initiated either by a hardware reset or by an enabled external interrupt. Reset redefines the SFRs but does not change the on-chip RAM. The reset should not be activated before VCC is restored to its normal operating level and must be held active long enough to allow the oscillator to restart and stabilize.

Oscillator Connections

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Programming the Flash – Parallel Mode The AT89S52 is shipped with the on-chip Flash memory array ready to be programmed. The programming interface needs a high-voltage (12-volt) program enable signal and is compatible with conventional third-party Flash or EPROM programmers. The AT89S52 code memory array is programmed byte-by-byte. Programming Algorithm: Before programming the AT89S52, the address, data, and control signals should be set up according to the “Flash Programming Modes” (Table 221) and Figure 22-1 and Figure 22-2. To program the AT89S52, take the following steps: 1. Input the desired memory location on the address lines. 2. Input the appropriate data byte on the data lines. 3. Activate the correct combination of control signals. 4. Raise EA/VPP to 12V. 5. Pulse ALE/PROG once to program a byte in the Flash array or the lock bits. The byte-write cycle is self-timed and typically takes no more than 50 μs. Repeat steps 1 through 5, changing the address and data for the entire array or until the end of the object file is reached. Data Polling: The AT89S52 features Data Polling to indicate the end of a byte write cycle. Dur-ing a write cycle, an attempted read of the last byte written will 31

result in the complement of the written data on P0.7. Once the write cycle has been completed, true data is valid on all outputs, and the next cycle may begin. Data Polling may begin any time after a write cycle has been initiated. Ready/Busy: The progress of byte programming can also be monitored by the RDY/BSY output signal. P3.0 is pulled low after ALE goes high during programming to indicate BUSY. P3.0 is pulled high again when programming is done to indicate READY. Program Verify: If lock bits LB1 and LB2 have not been programmed, the programmed code data can be read back via the address and data lines for verification. The status of the individ-ual lock bits can be verified directly by reading them back. Reading the Signature Bytes: The signature bytes are read by the same procedure as a nor-mal verification of locations 000H, 100H, and 200H, except that P3.6 and P3.7 must be pulled to a logic low. The values returned are as follows. (000H) = 1EH indicates manufactured by Atmel (100H) = 52H indicates AT89S52 (200H) = 06H Chip Erase: In the parallel programming mode, a chip erase operation is initiated by using the proper combination of control signals and by pulsing ALE/PROG low for a duration of 200 ns - 500 ns. In the serial programming mode, a chip erase operation is initiated by issuing the Chip Erase instruction. In this mode, chip erase is self-timed and takes about 500 ms. During chip erase, a serial read from any address location will return 00H at the data output.

32

Programming the Flash – Serial Mode The Code memory array can be programmed using the serial ISP interface while RST is pulled to VCC. The serial interface consists of pins SCK, MOSI (input) and MISO (output). After RST is set high, the Programming Enable instruction needs to be executed first before other operations can be executed. Before a reprogramming sequence can occur, a Chip Erase operation is required. The Chip Erase operation turns the content of every memory location in the Code array into FFH. Either an external system clock can be supplied at pin XTAL1 or a crystal needs to be connected across pins XTAL1 and XTAL2. The maximum serial clock (SCK) frequency should be less than 1/16 of the crystal frequency. With a 33 MHz oscillator clock, the maximum SCK frequency is 2 MHz. Serial Programming Algorithm To program and verify the AT89S52 in the serial programming mode, the following sequence is recommended: 1. Power-up sequence: a. Apply power between VCC and GND pins. b. Set RST pin to “H”. If a crystal is not connected across pins XTAL1 and XTAL2, apply a 3 MHz to 33 MHz clock to XTAL1 pin and wait for at least 10 milliseconds. 2. Enable serial programming by sending the Programming Enable serial instruction to pin MOSI/P1.5. The frequency of the shift clock supplied at pin SCK/P1.7 needs to be less than the CPU clock at XTAL1 divided by 16. 3. The Code array is programmed one byte at a time in either the Byte or Page mode. The write cycle is self-timed and typically takes less than 0.5 ms at 5V. 4. Any memory location can be verified by using the Read instruction which returns the content at the selected address at serial output MISO/P1.6. 5. At the end of a programming session, RST can be set low to commence normal device operation. Power-off sequence (if needed): 1. Set XTAL1 to “L” (if a crystal is not used). 2. Set RST to “L”. 3. Turn VCC power off. Data Polling:

33

The Data Polling feature is also available in the serial mode. In this mode, during a write cycle an attempted read of the last byte written will result in the complement of the MSB of the serial output byte on MISO.

34

Chapter.4 GSM FIRE SENSOR AND IR MODULE

GSM:-

35

GSM (Global System for Mobile communications: originally from Groupe Spécial Mobile) is the most popular standard for mobile phones in the world. Its promoter, the GSM Association, estimates that 80% of the global mobile market uses the standard.[1] GSM is used by over 3 billion people across more than 212 countries and territories.[2][3] Its ubiquity makes international roaming very common between mobile phone operators, enabling subscribers to use their phones in many parts of the world. GSM differs from its predecessors in that both signaling and speech channels are digital, and thus is considered a second generation (2G) mobile phone system. This has also meant that data communication was easy to build into the system. GSM EDGE is a 3G version of the protocol. The ubiquity of the GSM standard has been an advantage to both consumers (who benefit from the ability to roam and switch carriers without switching phones) and also to network operators (who can choose equipment from any of the many vendors implementing GSM[4]). GSM also pioneered a low-cost (to the network carrier) alternative to voice calls, the short message service (SMS, also called "text messaging"), which is now supported on other mobile standards as well. Another advantage is that the standard includes one worldwide emergency telephone number, 112.[5] This makes it easier for international travellers to connect to emergency services without knowing the local emergency number. Newer versions of the standard were backward-compatible with the original GSM phones. For example, Release '97 of the standard added packet data capabilities, by means of General Packet Radio Service (GPRS). Release '99 introduced higher speed data transmission using Enhanced Data Rates for GSM Evolution (EDGE).

36

Technical details:Cellular radio network
GSM is a cellular network, which means that mobile phones connect to it by searching for cells in the immediate vicinity. There are five different cell sizes in a GSM network—macro, micro, pico, femto and umbrella cells. The coverage area of each cell varies according to the implementation environment. Macro cells can be regarded as cells where the base station antenna is installed on a mast or a building above average roof top level. Micro cells are cells whose antenna height is under average roof top level; they are typically used in urban areas. Picocells are small cells whose coverage diameter is a few dozen metres; they are mainly used indoors. Femtocells are cells designed for use in residential or small business environments and connect to the service provider’s network via a broadband internet connection. Umbrella cells are used to cover shadowed regions of smaller cells and fill in gaps in coverage between those cells. Cell horizontal radius varies depending on antenna height, antenna gain and propagation conditions from a couple of hundred meters to several tens of kilometres. The longest distance the GSM specification supports in practical use is 35 kilometres (22 mi). There are also several implementations of the concept of an extended cell [12], where the cell radius could be double or even more, depending on the antenna system, the type of terrain and the timing advance. Indoor coverage is also supported by GSM and may be achieved by using an indoor picocell base station, or an indoor repeater with distributed indoor antennas fed through power splitters, to deliver the radio signals from an antenna outdoors to the separate indoor distributed antenna system. These are typically deployed when a lot of call capacity is needed indoors; for example, in shopping centers or airports. However, this is not

37

a prerequisite, since indoor coverage is also provided by in-building penetration of the radio signals from any nearby cell. The modulation used in GSM is Gaussian minimum-shift keying (GMSK), a kind of continuous-phase frequency shift keying. In GMSK, the signal to be modulated onto the carrier is first smoothed with a Gaussian low-pass filter prior to being fed to a frequency modulator, which greatly reduces the interference to neighboring channels (adjacent-channel interference).

GSM frequencies
GSM networks operate in a number of different frequency ranges (separated into GSM frequency ranges for 2G and UMTS frequency bands for 3G). Most 2G GSM networks operate in the 900 MHz or 1800 MHz bands. Some countries in the Americas (including Canada and the United States) use the 850 MHz and 1900 MHz bands because the 900 and 1800 MHz frequency bands were already allocated. Most 3G GSM networks in Europe operate in the 2100 MHz frequency band. The rarer 400 and 450 MHz frequency bands are assigned in some countries where these frequencies were previously used for firstgeneration systems. GSM-900 uses 890–915 MHz to send information from the mobile station to the base station (uplink) and 935–960 MHz for the other direction (downlink), providing 124 RF channels (channel numbers 1 to 124) spaced at 200 kHz. Duplex spacing of 45 MHz is used. In some countries the GSM-900 band has been extended to cover a larger frequency range. This 'extended GSM', E-GSM, uses 880–915 MHz (uplink) and 925–960 MHz (downlink), adding 50 channels (channel numbers 975 to 1023 and 0) to the original GSM-900 band. Time division multiplexing is used to allow eight full-rate or sixteen half-rate speech channels per radio frequency channel. There are eight radio timeslots (giving eight burst periods) grouped into what is called a TDMA frame. Half rate channels use 38

alternate frames in the same timeslot. The channel data rate for all 8 channels is 270.833 kbit/s, and the frame duration is 4.615 ms. The transmission power in the handset is limited to a maximum of 2 watts in GSM850/900 and 1 watt in GSM1800/1900.

Voice codecs
GSM has used a variety of voice codecs to squeeze 3.1 kHz audio into between 6.5 and 13 kbit/s. Originally, two codecs, named after the types of data channel they were allocated, were used, called Half Rate (6.5 kbit/s) and Full Rate (13 kbit/s). These used a system based upon linear predictive coding (LPC). In addition to being efficient with bitrates, these codecs also made it easier to identify more important parts of the audio, allowing the air interface layer to prioritize and better protect these parts of the signal. GSM was further enhanced in 1997 [13] with the Enhanced Full Rate (EFR) codec, a 12.2 kbit/s codec that uses a full rate channel. Finally, with the development of UMTS, EFR was refactored into a variable-rate codec called AMR-Narrowband, which is high quality and robust against interference when used on full rate channels, and less robust but still relatively high quality when used in good radio conditions on half-rate channels.

39

Network structure

The structure of a GSM network The network behind the GSM seen by the customer is large and complicated in order to provide all of the services which are required. It is divided into a number of sections and these are each covered in separate articles.


the Base Station Subsystem (the base stations and their controllers). the Network and Switching Subsystem (the part of the network most similar to a fixed network). This is sometimes also just called the core network.





the GPRS Core Network (the optional part which allows packet based Internet connections).



all of the elements in the system combine to produce many GSM services such as voice calls and SMS.

Subscriber Identity Module (SIM)
One of the key features of GSM is the Subscriber Identity Module, commonly known as a SIM card. The SIM is a detachable smart card 40

containing the user's subscription information and phone book. This allows the user to retain his or her information after switching handsets. Alternatively, the user can also change operators while retaining the handset simply by changing the SIM. Some operators will block this by allowing the phone to use only a single SIM, or only a SIM issued by them; this practice is known as SIM locking, and is illegal in some countries.

Phone locking
Sometimes mobile phone operators lock mobiles which they sell to their own network. This is done because the price of the mobile phone is typically subsidised with revenue from subscriptions, and operators want to try to recoup this investment before a subscriber leaves for another operator. A subscriber can usually contact the provider to remove the lock for a fee, utilize private services to remove the lock, or make use of software and websites available on the Internet to unlock the handset themselves. While most web sites offer the unlocking for a fee, some do it for free. The locking applies to the handset not to SIM card. In some territories (e.g. Bangladesh, Hong Kong, Pakistan and others) all phones are sold unlocked. In others (e.g. Belgium, Finland, New Zealand and others) it is unlawful for operators to offer any form of subsidy on the phone's price.

GSM security
GSM was designed with a moderate level of security. The system was designed to authenticate the subscriber using a pre-shared key and challenge-response. Communications between the subscriber and the base station can be encrypted. The development of UMTS introduces an optional USIM, that uses a longer authentication key to give greater security, as well as mutually authenticating the network and the user whereas GSM only authenticates the user to the network (and not vice 41

versa).

The

security

model

therefore

offers

confidentiality

and non-

authentication, but limited authorization capabilities, and no repudiation.

GSM uses several cryptographic algorithms for security. The A5/1 and A5/2 stream ciphers are used for ensuring over-the-air voice privacy. A5/1 was developed first and is a stronger algorithm used within Europe and the United States; A5/2 is weaker and used in other countries. Serious weaknesses have been found in both algorithms: it is possible to break A5/2 in real-time with a ciphertext-only attack, and in February 2008, Pico Computing, Inc revealed its ability and plans to commercialize FPGAs that allow A5/1 to be broken with a rainbow table attack. The system supports multiple algorithms so operators may replace that cipher with a stronger one. On 28 December 2009 German computer engineer Karsten Nohl

announced that he had cracked the A5/1 cipher. According to Nohl, he developed a number of rainbow tables (static values which reduce the time needed to carry out an attack) and have found new sources for known plaintext attacks. He also said that it is possible to build "a full GSM interceptor ... from open source components" but that they had not done so because of legal concerns. In 2010, threatpost.com reported that "A group of cryptographers has developed a new attack that has broken Kasumi, the encryption algorithm used to secure traffic on 3G GSM wireless networks. The technique enables them to recover a full key by using a tactic known as a related-key attack, but experts say it is not the end of the world for Kasumi." Kasumi is the name for the A5/3 algorithm, used to secure most 3g GSM traffic.

Fire Alarm 42

An reverse biased germanium diode is used here as a heat sensor at normal room temperature the reverse resistance of the diode is very high in the order of over 10 kilo ohms so it produce no effects on the transistor Q1 which conducts and keeps the reset pin 4 of ic 555 at its ground level, and so the alarm doesn’t get activated. When the temperature in the vicinity of the diode (the sensor) increases in case of fire, the reverse resistance of the germanium diode drops at about 70 degree its resistance drops to a value below 1 kilo ohms this stops Q1 conduction and the 555 ic pin 4 becomes positive through the resistor R1 which activates the alarm.

IR Remote Control Theory
The cheapest way to remotely control a device within a visible range is via Infra-Red light. Almost all audio and video equipment can be controlled this way nowadays. Due to this wide spread use the required components are quite cheap, thus making it ideal for us hobbyists to use IR control for our own projects. 43

This part of my knowledge base will explain the theory of operation of IR remote control, and some of the protocols that are in use in consumer electronics. Infra-Red Light Infra-Red actually is normal light with a particular colour. We humans can't see this colour because its wave length of 950nm is below the visible spectrum. That's one of the reasons why IR is chosen for remote control purposes, we want to use it but we're not interested in seeing it. Another reason is because IR LEDs are quite easy to make, and therefore can be very cheap. Although we humans can't see the Infra-Red light emitted from a remote control doesn't mean we can't make it visible. A video camera or digital photo camera can "see" the Infra-Red light as you can see in this picture. If you own a web cam you're in luck, point your remote to it, press any button and you'll see the LED flicker. Unfortunately for us there are many more sources of Infra-Red light. The sun is the brightest source of all, but there are many others, like: light bulbs, candles, central heating system, and even our body radiates Infra-Red light. In fact everything that radiates heat, also radiates Infra-Red light. Therefore we have to take some precautions to guarantee that our IR message gets across to the receiver without errors. Modulation Modulation is the answer to make our signal stand out above the noise. With modulation we make the IR light source blink in a particular frequency. The IR receiver will be tuned to that frequency, so it can ignore everything else. You can think of this blinking as attracting the receiver's attention. We humans also notice the blinking of yellow lights at construction sites instantly, even in bright daylight.

44

In the picture above you can see a modulated signal driving the IR LED of the transmitter on the left side. The detected signal is coming out of the receiver at the other side. In serial communication we usually speak of 'marks' and 'spaces'. The 'space' is the default signal, which is the off state in the transmitter case. No light is emitted during the 'space' state. During the 'mark' state of the signal the IR light is pulsed on and off at a particular frequency. Frequencies between 30kHz and 60kHz are commonly used in consumer electronics. At the receiver side a 'space' is represented by a high level of the receiver's output. A 'mark' is then automatically represented by a low level. Please note that the 'marks' and 'spaces' are not the 1-s and 0-s we want to transmit. The real relationship between the 'marks' and 'spaces' and the 1-s and 0-s depends on the protocol that's being used. More information about that can be found on the pages that describe the protocols. The Transmitter The transmitter usually is a battery powered handset. It should consume as little power as possible, and the IR signal should also be as strong as possible to achieve an acceptable control distance. Preferably it should be shock proof as well. Many chips are designed to be used as IR transmitters. The older chips were dedicated to only one of the many protocols that were invented. Nowadays very low power microcontrollers are used in IR transmitters for the simple reason that they are more flexible in their use. When no button is pressed they are in a very low power sleep mode, in which hardly any current is consumed. The processor wakes up to transmit the appropriate IR command only when a key is pressed. Quartz crystals are seldom used in such handsets. They are very fragile and tend to break easily when the handset is dropped. Ceramic resonators are much more suitable here, because they can withstand larger physical shocks. The fact that they are a little less accurate is not important. The current through the LED (or LEDs) can vary from 100mA to well over 1A! In order to get an acceptable control distance the LED currents have to be as high as possible. A trade45

off should be made between LED parameters, battery lifetime and maximum control distance. LED currents can be that high because the pulses driving the LEDs are very short. Average power dissipation of the LED should not exceed the maximum value though. You should also see to it that the maximum peek current for the LED is not exceeded. All these parameters can be found in the LED's data sheet. A simple transistor circuit can be used to drive the LED. A transistor with a suitable HFE and switching speed should be selected for this purpose. The resistor values can simply be calculated using Ohm's law. Remember that the nominal voltage drop over an IR LED is approximately 1.1V. The normal driver, described above, has one disadvantage. As the battery voltage drops, the current through the LED will decrease as well. This will result in a shorter control distance that can be covered. An emitter follower circuit can avoid this. The 2 diodes in series will limit the pulses on the base of the transistor to 1.2V. The base-emitter voltage of the transistor subtracts 0.6V from that, resulting in a constant amplitude of 0.6V at the emitter. This constant amplitude across a constant resistor results in current pulses of a constant magnitude. Calculating the current through the LED is simply applying Ohm's law again.

The Receiver Many different receiver circuits exist on the market. The most important selection criteria are the modulation frequency used and the availability in you region.

In the picture above you can see a typical block diagram of such an IR receiver. Don't be alarmed if you don't understand this part of the description, for everything is built into one single electronic component. The received IR signal is picked up by the IR detection diode on the left side of the diagram. 46

This signal is amplified and limited by the first 2 stages. The limiter acts as an AGC circuit to get a constant pulse level, regardless of the distance to the handset. As you can see only the AC signal is sent to the Band Pass Filter. The Band Pass Filter is tuned to the modulation frequency of the handset unit. Common frequencies range from 30kHz to 60kHz in consumer electronics. The next stages are a detector, integrator and comparator. The purpose of these three blocks is to detect the presence of the modulation frequency. If this modulation frequency is present the output of the comparator will be pulled low. As I said before, all these blocks are integrated into a single electronic component. There are many different manufacturers of these components on the market. And most devices are available in several versions each of which are tuned to a particular modulation frequency. Please note that the amplifier is set to a very high gain. Therefore the system tends to start oscillating very easily. Placing a large capacitor of at least 22µF close to the receiver's power connections is mandatory to decouple the power lines. Some data sheets recommend a resistor of 330 Ohms in series with the power supply to further decouple the power supply from the rest of the circuit. There are several manufacturers of IR receivers on the market. Siemens, Vishay and Telefunken are the main suppliers here in Europe. Siemens has its SFH506-xx series, where xx denotes the modulation frequency of 30, 33, 36, 38, 40 or 56kHz. Telefunken had its TFMS5xx0 and TK18xx series, where xx again indicates the modulation frequency the device is tuned to. It appears that these parts have now become obsolete. They are replaced by the Vishay TSOP12xx, TSOP48xx and TSOP62xx product series. Sharp, Xiamen Hualian and Japanese Electric are 3 Asian IR receiver producing companies. Sharp has devices with very cryptic ID names, like: GP1UD26xK, GP1UD27xK and GP1UD28xK, where x is related to the modulation frequency. Hualian has it's HRMxx00 series, like the HRM3700 and HRM3800. Japanese Electric has a series of devices that don't include the modulation frequency in the part's ID. The PIC-12042LM is tuned to 36.7kHz, and the PIC12043LM is tuned to 37.9kHz.

47

Chapter.5 WORKING FLOW OF THE PROJECT &
48

SCHEMATIC DIAGRAM

BLOCK DIAGRAM

GSM MODEM 8051 MICRO CONTROLLER REGULATOR POWER SUPPLY

FIRE SENSOR

IR RECEIVER 49

IR TRANSMITTER

Circuit diagram:

50

51

Block diagram will consist the following modules: • GSM • Fire sensor • IR sensors Working flow of the project:
This project GSM based home security and automation system will be useful for maintaining the security at the home. By using this project we can maintain the security by finding if any fire occurred in the home and for finding if anybody entered into the home. If anyone problem out of these two occurred immediately SMS will be sent to owner of the house. This project will be helpful even the person is in the remote location also.

Schematic Diagram & Hardware:
REGULATED POWER SUPPLY 52

A variable regulated power supply, also called a variable bench power supply, is one where you can continuously adjust the output voltage to your requirements. Varying the output of the power supply is the recommended way to test a project after having double checked parts placement against circuit drawings and the parts placement guide. This type of regulation is ideal for having a simple variable bench power supply. Actually this is quite important because one of the first projects a hobbyist should undertake is the construction of a variable regulated power supply. While a dedicated supply is quite handy e.g. 5V or 12V, it's much handier to have a variable supply on hand, especially for testing. Most digital logic circuits and processors need a 5 volt power supply. To use these parts we need to build a regulated 5 volt source. Usually you start with an unregulated power To make a 5 volt power supply, we use a LM7805 voltage regulator IC (Integrated Circuit). The IC is shown below.

The LM7805 is simple to use. You simply connect the positive lead of your unregulated DC power supply (anything from 9VDC to 24VDC) to the Input pin, connect the negative lead to the Common pin and 53

then when you turn on the power, you get a 5 volt supply from the Output pin.

CIRCUIT FEATURES

Brief description of operation: Gives out well regulated +5V output, output current capability of 100 mA Circuit protection: Built-in overheating protection shuts down output when regulator IC gets too hot Circuit complexity: Very simple and easy to build Circuit performance: Very stable +5V output voltage, reliable operation Availability of components: Easy to get, uses only very common basic components Design testing: Based on datasheet example circuit, I have used this circuit succesfully as part of many electronics projects Applications: Part of electronics devices, small laboratory power supply Power supply voltage: Unreglated DC 8-18V power supply Power supply current: Needed output current + 5 mA Component costs: Few dollars for the electronics components + the input transformer cost BLOCK DIAGRAM

54

The above block diagram will shows the regulated power supply in this the power supply can be given from 230V AC supply which will be given to the 12v-0-12v step down transformer whose output voltage 12V AC. Again this voltage can be converted into DC voltage by using the Bridge rectifier, but this voltage is a pulsating DC voltage and this can be converting into pure DC by connecting the capacitors, and this pure 12V DC will be given to the 7805 voltage regulators whose output voltage is an 5V DC and this can be given to the microcontroller as a power supply. EXAMPLE CIRCUIT DIAGRAM:

55

WE CAN EVEN USE A USB CONNECTOR FOR THE REQUIRED SUPPLY INSTEAD OF THE ABOVE CIRCUIT

56

Chapter.6 SOURCE CODE

# include <8052.h> # include "LcdV2.h" # include "GsmV1.h" # include "VerV1.h" # define FIRE P1_1 # define IR P1_0 void main(void) { unsigned int i j = 0;
57

// On P0 // On Serial Port // No Port

= 0,

unsigned char ucAddrCounter

= 0;

unsigned char ucSmsData[20] = "Gate is Opened."; unsigned char ucSmsData2[20] = "Fire Caught"; P2_0 = 0; IE = 0x93; LcdInit(); DisplayVersion(); SerialInit(); GsmInit(); SendInitAtCmds(); while(1) { DisplayVersion(); while((IR == 1) && (FIRE == 0)); if(IR == 0) { P2_0 = 1; LcdInit(); LcdPuts("*Security ALERT*"); LcdCmd(NEW_LINE); LcdPuts("Gate is Opened ..."); SendSms(&ucSmsData[0],15); P2_0 = 0; } if(FIRE == 1) {
58

P2_0 = 1; LcdInit(); LcdPuts("Fire Caught "); LcdCmd(NEW_LINE); LcdPuts("Sending SMS..."); SendSms(&ucSmsData2[0], 11); P2_0 = 0; } for(i = 0; i < 10; i++) for(j = 0; j < 40000; j++); } } # define RX_BUF_SIZE # define SMS_INDEX 30 5 43

# define SMS_DATA_LEN

# define CMD1_START 0 # define CMD1_LEN # define CMD2_LEN # define CMD3_LEN # define CMD4_LEN # define CMD5_LEN 2 9 17 10 5
59

# define CMD2_START 0 # define CMD3_START 9 # define CMD4_START 26 # define CMD5_START 36

# define CMD6_START # define CMD6_LEN # define CMD7_START # define CMD7_LEN # define OK_LEN 2 # define CR_LEN 3

41 4 41 4 5

# define ERROR_STR_LEN

/************************************************ Global variable declarations */ unsigned char gucRxBuf[RX_BUF_SIZE], gucSmsData[SMS_DATA_LEN]; unsigned char gucSmsCount gucRxCount gucGsmCh = 0, = 0; = 0,

unsigned int gucGsmState = 0; unsigned char gucAtCmds[49] = "AT+CMGF=0AT+CNMI=2,2,0,0,0AT+IFC=O,OAT&D0ATE 0ATE1";

/ ************************************************************* ** Prototypes */
60

void SerialInit(void); void GsmInit(void); void SendInitAtCmds(void); void SerialPutc(unsigned char ucCh); void SerialPut(unsigned char ucIndex,unsigned int ucLen); unsigned char SendAtCmd(unsigned char ucCmdStart,unsigned char ucCmdLen); void SendSms(unsigned char *ucpStr,unsigned char Len); void SendSms2(unsigned char *ucpStr,unsigned char Len); void RecieveSms(unsigned char *ucSmsData, unsigned char ucLen); /**************************************************** Function Definitions */ void serial0() interrupt 4 { gucGsmCh = SBUF; switch(gucGsmState) { case 0: if(gucGsmCh == '+') gucGsmState = 1; break; case 1:
61

if((gucGsmCh == 'c') || (gucGsmCh == 'C')) gucGsmState = 2; else gucGsmState = 0; break; case 2: if((gucGsmCh == 'm') || (gucGsmCh == 'M')) gucGsmState = 3; else gucGsmState = 0; break; case 3: if((gucGsmCh == 't') || (gucGsmCh == 'T')) gucGsmState = 4; else gucGsmState = 0; break; case 4: if(gucGsmCh == ':') gucGsmState = 5; else gucGsmState = 0; break; case 5: gucSmsCount++;
62

gucRxCount = 0; if(gucSmsCount >= SMS_INDEX) gucSmsData[gucSmsCount SMS_INDEX] = gucGsmCh; break; defalut: break; } gucRxBuf[gucRxCount] = gucGsmCh; gucRxCount++; if(gucRxCount >= RX_BUF_SIZE) gucRxCount = 0; RI = 0;

} /* ************************************************************* **************************************** */ void GsmInit(void) { unsigned char i; gucGsmState = 0; gucSmsCount = 0; gucGsmCh TI = 0;
63

= 0;

RI = 0; for(i = 0; i < RX_BUF_SIZE; i++) gucRxBuf[i] = 0; for(i = 0; i < SMS_DATA_LEN; i++) gucSmsData[i] = 0; } /* ************************************************************* **************************************** */ void SendInitAtCmds(void) { while(!(SendAtCmd(CMD4_START,CMD4_LEN))); while(!(SendAtCmd(CMD5_START,CMD5_LEN))); while(!(SendAtCmd(CMD1_START,CMD1_LEN))); while(!(SendAtCmd(CMD2_START,CMD2_LEN))); while(!(SendAtCmd(CMD3_START,CMD3_LEN))); while(!(SendAtCmd(CMD6_START,CMD6_LEN))); } /* ************************************************************* **************************************** */ void SerialInit(void) { TMOD = 0x20; TH1 = 0xfd;
64

SCON = 0x50; } /* ************************************************************* **************************************** */ void SerialPutc(unsigned char ucCh) { unsigned int i = 0; unsigned int j = 0; SBUF = ucCh; while(TI == 0); TI = 0; for(i = 0; i < 20000; i++); } /* ************************************************************* **************************************** */ void SerialPut(unsigned char ucIndex,unsigned int ucLen) { unsigned int i; for(i = ucIndex; i < (ucIndex + ucLen); i++) SerialPutc(gucAtCmds[i]); SerialPutc(0x0d); SerialPutc(0x0a);
65

} /* ************************************************************* **************************************** */ unsigned char SendAtCmd(unsigned char ucCmdStart,unsigned char ucCmdLen) { unsigned int i,j;

gucRxCount = 0; SerialPut(ucCmdStart,ucCmdLen); for(j = 0; j < 5; j++) for(i = 0; i < 40000; i++);

if((gucRxBuf[ucCmdLen+3] == 'O') || (gucRxBuf[ucCmdLen+3] == 'o')) { for(i = ucCmdLen+3; i < ucCmdLen+5; i++) LcdPutc(gucRxBuf[i]); gucRxCount = 0; } else { #ifdef GSM_DEBUG

66

if((gucRxBuf[ucCmdLen+3] == 'E') || (gucRxBuf[ucCmdLen+3] == 'e')) { for(i = ucCmdLen+3; i < ucCmdLen+8; i++) LcdPutc(gucRxBuf[i]); gucRxCount = 0; } else LcdPuts("Unknown Data"); #endif return 0; } #ifdef GSM_DEBUG LcdCmd(NEW_LINE); LcdPuts("Modem ACK : OK."); for(j = 0; j < 5; j++) for(i = 0; i < 40000; i++); #endif return 1; } /* ************************************************************* **************************************** */ void RecieveSms(unsigned char *ucSmsData, unsigned char ucLen) {
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unsigned int i,j; GsmInit(); while(gucSmsCount < SMS_INDEX); for(i = 0; i < 10; i++) for(j = 0; j < 40000; j++); for(i = 0; i < ucLen; i++) *(ucSmsData + i) = gucSmsData[i]; *(ucSmsData + i) = 0; } /* ************************************************************* **************************************** */ void SendSms(unsigned char *ucpStr,unsigned char ucLen) { # define SMS_CMD_LEN1 21 # define CTRLZ 0x1a unsigned char ucSmsSendCmd[21] = "AT+CMGS=+918179715208";

unsigned int ucIndex i = 0,
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= 0,

j gucRxCount = 0;

= 0;

for(ucIndex = 0; ucIndex < SMS_CMD_LEN1; ucIndex++) SerialPutc(ucSmsSendCmd[ucIndex]); for(ucIndex = 0; ucIndex < SMS_CMD_LEN1; ucIndex++) for(i = 0; i < ucLen; i++) SerialPutc(*(ucpStr+i)); for(i = 0; i < 2; i++) for(j = 0; j < 40000; j++); SerialPutc(CTRLZ); for(i = 0; i < 10; i++) for(j = 0; j < 40000; j++); } # define LCD_DELAY 400 # define LCD_PORT P0 # define RS # define RW # define EN P0_0 P0_1 P0_2

bit gbStatus = 0;

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/* ************************************************************* ************************** */ void Delay(unsigned int j) { unsigned int i; for(i = 0; i < j ; i++); } /* ************************************************************* ************************** */ void LcdInitWrite(unsigned char ucCmd) { RS = 0; RW = 0; LCD_PORT = ucCmd; EN = 1; Delay(LCD_DELAY); EN = 0; } /* ************************************************************* ************************** */ void LcdCmd(unsigned char ucCmd) { unsigned char ucTemp;
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if(gbStatus) { gbStatus=0; goto NEXT; } RS = 0; NEXT: RW = 0; ucTemp = ucCmd; ucTemp &= 0xf0; LCD_PORT &= 0x0f; LCD_PORT |= ucTemp; EN = 1; Delay(LCD_DELAY); EN = 0; ucTemp = (ucCmd >> 4); ucTemp &= 0xf0; LCD_PORT &= 0x0f; LCD_PORT |= ucTemp; } /* ************************************************************* ************************** */ void LcdData(unsigned char ucData) {
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gbStatus = 1; RS = 1; LcdCmd(ucData); } /* ************************************************************* ************************** */ void LcdInit(void) { LcdCmd(0x28); Delay(LCD_DELAY); LcdCmd(4); Delay(LCD_DELAY); LcdCmd(0x85); Delay(LCD_DELAY); LcdCmd(6); Delay(LCD_DELAY); LcdCmd(1); Delay(LCD_DELAY); LcdCmd(INIT_CMD); Delay(LCD_DELAY); } /* ************************************************************* ************************** */
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void LcdPuts(unsigned char *ucStr) { unsigned int i; for(i = 0; ucStr[i] !=0 ; i++) LcdData(ucStr[i]); } /* ************************************************************* ************************** */ void LcdPutc(unsigned char ucCh) { LcdData(ucCh); }

void LcdClear(void) { LcdCmd(0x01); }

73

Keil software 1. 2.
Click on the Keil uVision Icon on DeskTop The following fig will appear

3. 4.

Click on the Project menu from the title bar Then Click on New Project

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5.

Save the Project by typing suitable project name with no extension in u r own folder sited in either C:\ or D:\

6. 7. 8.

Then Click on Save button above. Select the component for u r project. i.e. Philips…… Click on the + Symbol beside of Philips 75

9.

Select AT89S52 as shown below

10. Then Click on “OK”
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11. The Following fig will appear

12. Then Click either YES or NO………mostly “NO”

13. Now your project is ready to USE 14. Now double click on the Target1, you would get another option
“Source group 1” as shown in next page.

77

15. Click on the file option from menu bar and select “new”

78

16. The next screen will be as shown in next page, and just maximize
it by double clicking on its blue boarder.

17. Now start writing program in either in “C” or “ASM” 18. For a program written in Assembly, then save it with extension “.
asm” and for “C” based program save it with extension “ .C”

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19. Now right click on Source group 1 and click on “Add files to
Group Source”

20. Now you will get another window, on which by default “C” files
will appear.

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21. Now select as per your file extension given while saving the file 22. Click only one time on option “ADD” 23. Now Press function key F7 to compile. Any error will appear if so
happen.

24. If

the

file

contains

no

error,

then

press

Control+F5

simultaneously.

25. The new window is as follows

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26. Then Click “OK”

27. Now Click on the Peripherals from menu bar, and check your
required port as shown in fig below

28. Drag the port a side and click in the program file.

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29. Now keep Pressing function key “F11” slowly and observe. 30. You are running your program successfully

BIBLIOGRAPHY The 8051 Micro controller and Embedded Systems -Muhammad Ali Mazidi Janice Gillispie Mazidi The 8051 Micro controller Architecture, Programming & Applications -Kenneth J.Ayala Fundamentals Of Micro processors and Micro computers -B.Ram 83

Micro processor Architecture, Programming & Applications -Ramesh S.Gaonkar Electronic Components -D.V.Prasad Wireless Communications - Theodore S. Rappaport Mobile Tele Communications - William C.Y. Lee

References on the Web: www.national.com www.nxp.com www.8052.com www.microsoftsearch.com www.geocities.com

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