Objectives: Discover the operation of 7-segment displays, BCD-to-7-semgment decoders, multiplexers and demultiplexers. Demonstrate the simulation of a discrete DEMUX and decode operation with discrete components. Construct a discrete circuit with these components. Use VHDL to emulate this circuit within an FPGA.
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Objectives: Discover the operation of 7-segment displays, BCD-to-7-semgment decoders, multiplexers and demultiplexers. Demonstrate the simulation of a discrete DEMUX and decode operation with discrete components. Construct a discrete circuit with these components. Use VHDL to emulate this circuit within an FPGA.