FINGERPRINT BASED ACCESS CONTROL SYSTEM WITH USER FACE IDENTIFICATION
Biometrics is making revolution in the field of Biometrics access control and security systems. Most of the systems used today are using punch cards or smart cards for time & attendance purposes. The main disadvantage of this system is there is always chance of fake entry and thus false storage will take place. This problem can be overcome by use of fingerprint scan verification. Since thumb is the unique identity of each individual it is not possible to enter fake timings for entry or exit.
But in case of highly secured systems ex, Military fingerprint alone cannot provide premises the highest level of security. In this case to make a highly secured system face identification is additionally provided as an ultra measure.
This project implements a Biometrics Access Control Terminal with fingerprint fifin ngerprint Cont Contrrol ol Terminal gerprint & face identification using an ARM microcontroller. Ethernet capability can also be provided to make a complete Network Enabled Biometrics Access Control System.
The fingerprint of the user will be captured using the fingerprint scanner module. The fingerprint would be processed by the module and if a match is found then this data is communicated to the ARM uC.
Then uC will also capture the timestamp of the fingerprint scan from the RTC.
All these timing details details will be stored stored in the memory.
LCD will be used to display different messages.
LED and buzzer indication can also be provided for access allowed/access denied etc.
The keyboard will be used to enter user ID, to change user ID, for selecting modes etc.
Once a user is his/her successfully verified at the terminal using fingerprint, a live image of the user is captured using the CMOS camera at the terminal.
The image will be transmitted over TCP/IP to the server.
The software on the sever will retrieve the user image stored on the server database and will provide a comparison between the retrieved and the live image.
Once the identity of the user is verified completely the user can be granted access to the premises.
Fingerprint Scanner Module.
CMOS Color Camera. Ethernet Controller Interface. Display & Keypad.
Analog Interface nterface ffo orr Door Control. Control. IIn terface for
FINGER PRINT SCANNER MODULE
Fingerprint image acquisition is considered the most critical step of an automated fingerprint authentication system, as it determines the final fingerprint image quality, which has drastic effects on the overall system performance. There are different types of fingerprint readers on the market, but the basic idea behind each capture approach is to measure in some way the physical difference between ridges and valleys.
proposed methods can can be grouped grou ped All the p prroposed oposed methods group ed in two major families: solid-state fingerprint readers and optical fingerprint readers.
The procedure for capturing a fingerprint using a sensor consists of rolling or touching with the finger onto a sensing area, which according to the physical principle in use (capacitive, optical, thermal, acoustic, etc.) captures the
difference between valleys and ridges.
When a finger touches or rolls onto a surface, elastic skin deforms.the The quantity and direction of the pressure applied by the user, the skin conditions and the projection of an irregular 3D object (the finger) onto a 2D flat plane introduce distortions, noise and inconsistencies in the captured fingerprint image.
These problems result in inconsistent, irreproducible and non-uniform contacts and, during each acquisition, their effects on the same fingerprint results are different and uncontrollable.
The representation of the same fingerprint changes every time the finger is placed on the sensor plate, increasing the complexity of the fingerprint matching, impairing the system performance, and consequently limiting the widespread use of this biometric technology.
CMOS COLOR CAMERA
CMOS image sensor
An active-pixel -pixel sen sorr (APS), also also active active-p ixel sensor senso commonly written active pixel sensor, is an image sensor consisting of an integrated circuit containing an array of
pixel sensors, each containing a photo detector andpixel an active amplifier. There are many types of active pixel sensors includinginthe most commonly cellCMOS phone APS used cameras, web cameras and in
Such an image sensor is produced by a CMOS process (and is hence also a CMOS is hence known asprocess a CMOS(and sensor), and also has emerged as an alternative to chargecoupled device (CCD) imager sensors.
The term active pixel sensor is is also used to refer to the individual pixel sensor itself, as opposed to the image sensor; in that case is sometimes calledthe an image active sensor pixel sensor imager, active-pixel image sensor, or active-pixelsensor (APS) imager.
The LPC2131/32/34/36/38 LPC2131/32/34/36/38 micro-controllers are based on a 16/32-bit ARM7TDMI-S CPU with real-time emulation and embedded trace support, that combine the microcontroller with 32kB, 64kB, 128kB, 256kB and 512kB of embedded high-speed flash memory.
A 128-bit wide memory interface and a unique accelerator architecture enable 32-bit code
execution at maximum clock rate.
Due to their tiny size and low power consumption, theseminiaturization microcontrollers are ideal for applications where is a key requirement, such as access control and pointof-sale.
With a wide range of serial communications interfaces and on-chip SRAM options of 8 kB, 16 kB, and 32 kB, they are very well suited for communication gateways and protocol converters, soft modems, voice recognition and low-end imaging, providing both large buffer size and high processing power.
16/32-bit ARM7TDMI-S microcontroller in a tiny LQFP64 or HVQFN package. 8/16/32 kB of on-chip RAM flash and 32/64/128/256/512 kBstatic of on-chip program memory. 128-bit wide interface/accelerator enables high-speed 60 MHz operation. In-System Programming/In-Application Programming (ISP/IAP) via on-chip bootloader software.
Single flash sector or full chip erase in 400 ms and programming of 256 B in 1 ms. Embedded ICE RT and Embedded Trace interfaces offer real-time debugging with the on-chip RealMonitor software and high-speed tracing of instruction execution.
Low power Real-time clock with independent power and dedicated 32 kHz clock input.
Vectored interrupt controller with configurable priorities and vector addresses. Up to forty-seven 5 V tolerant general purpose I/O pins in tiny LQFP64 or HVQFN package. Up to nine edge or level sensitive external interrupt pins available. 60 MHz maximum CPU clock available from programmable on-chip PLL with settlingtime of 100 ms. Etc….