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From Nand to Tetris in 12 Steps
Here’s a constant and an operator. Now go build a computer How?

Nand

F al se

One step at a time

The Elements of Computing Systems: Building a Modern Computer From First Principles
Noam Nisan and Shimon Schocken, MIT Press, 2005
Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 1

The Computer Science Curriculum
Math CS theory Systems Various Programming Some Open Issues: Lack of integration Lack of comprehension Our Solution: A new, integrative caspstone course Textbook: The Elements of Computing Systems Nisan and Schocken, MIT Press 2005.
Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 2

Course Contents
Hardware: Logic gates, Boolean arithmetic, multiplexors, flip-flops, registers, RAM units, counters, Hardware Description Language, chip simulation and testing. Architecture: ALU/CPU design and implementation, machine code, assembly language programming, addressing modes, memory-mapped input-output (I/O). Data structures and algorithms: Stacks, hash tables, lists, recursion, Algorithms arithmetic algorithms, geometric algorithms, running time considerations. Programming Languages: Object-based design and programming, abstract data types, scoping rules, syntax and semantics, references, OS libraries. Compilers: Lexical analysis, top-down parsing, symbol tables, virtual stackbased machine, code generation, implementation of arrays and objects. Software Engineering: Modular design, the interface/implementation paradigm, API design and documentation, proactive test planning, quality assurance, programming at the large.
Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 3

Hardware

Systems

The Course Theme: Let’s Build a Computer
Course Goals Explicit: Let’s build a computer! Implicit: Understand ... Key hardware & software abstractions Key interfaces: compilation, VM, O/S Appreciate: Science history and method Plus: Have fun.

Course Methodology Constructive: do-it-yourself Self-contained: only requirement is programming Guided: all "plans" are given Focused: no optimization, no exceptions, no advanced features.
Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

Course

Nand

F al se

slide 4

Sample Applications

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 5

Sample Applications

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 6

Sample Applications

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 7

Sample Applications

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 8

Course map
hardware platform
machine language

Software hierarchy
operating system

P4 P5

P12
compiler

prog. language

P9

computer architecture

P10,11

ALU / CPU

memory units

stack machine

P2
various combinational chips various sequential chips

P3
virtual machine

P7,8

P1

essential theory (Boolean algebra and gate logic)

assembly

P = Instructional unit

assembler

P6

(chapter/lecture/project/week)
machine language

Each unit is self-contained Each unit provides the building blocks with which we build the unit above it.

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 9

Hardware projects
hardware platform
machine language

Hardware projects: P1: Elementary logic gates
P5

P4

computer architecture

P2: Combinational gates (ALU) P3: Sequential gates (memory)
P3

ALU / CPU

memory units

P2
various combinational chips various sequential chips

P4: Machine language P5: Computer architecture

P1

essential theory (Boolean algebra and gate logic)

Tools: HDL (Hard. Descr. Language) Test Description Language Hardware simulator.

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 10

Project 1: Elementary logic gates
Given: Nand(a,b), false Not(a) = Nand(a,a) true = Not(false) And(a,b) = Not(Nand(a,b)) Or(a,b) = Not(And(Not(a),Not(b))) Mux(s,a,b) = Or(And(s,a),And(Not(s),b)) Etc. - 12 gates altogether.
a a 0 0 0 0 1 1 1 1 b b 0 0 1 1 0 0 1 1 Nand(a,b) Nand(a,b) 1 1 1 1 1 1 0 0

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 11

Building an And gate
And.cmp

Contract: When running your .hdl on our .tst, your .out should be the same as our .cmp.

a b

And

out

a a 0 0 0 0 1 1 1 1

b out b out 0 0 0 0 1 0 1 0 0 0 0 0 1 1 1 1

And.hdl
CHIP And CHIP And { { IN a, b; IN a, b; OUT out; OUT out; // implementation missing // implementation missing } }

And.tst
load And.hdl, load And.hdl, output-file And.out, output-file And.out, compare-to And.cmp, compare-to And.cmp, output-list a b out; output-list a b out; set a 0,set b 0,eval,output; set a 0,set b 0,eval,output; set a 0,set b 1,eval,output; set a 0,set b 1,eval,output; set a 1,set b 0,eval,output; set a 1,set b 0,eval,output; set a 1, set b 1, eval, output; set a 1, set b 1, eval, output;

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 12

Building an And gate
Interface: And(a,b) = 1 exactly when a=b=1

a b

And

out

And.hdl
CHIP And CHIP And { { IN a, b; IN a, b; OUT out; OUT out; // implementation missing // implementation missing } }

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 13

Building an And gate
Implementation: And(a,b) = Not(Nand(a,b))

a out b

And.hdl
CHIP And CHIP And { { IN a, b; IN a, b; OUT out; OUT out; // implementation missing // implementation missing } }

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 14

Building an And gate
Implementation: And(a,b) = Not(Nand(a,b))

a b

a Nand b out x in Not out

out

And.hdl
CHIP And CHIP And { { IN a, b; IN a, b; OUT out; OUT out; // implementation missing // implementation missing } }

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 15

Building an And gate
Implementation: And(a,b) = Not(Nand(a,b))

a b

a NAND b out x in NOT out

out

And.hdl
CHIP And CHIP And { { IN a, b; IN a, b; OUT out; OUT out; Nand(a = a, Nand(a = a, b = b, b = b, out = x); out = x); Not(in = x, out = out) Not(in = x, out = out) } }

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 16

Hardware simulator

HDL program

test script

a
And

gate diagram
b
And

Or

out

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 17

Hardware simulator

HDL program

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 18

Hardware simulator

HDL program output file

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 19

Chip anatomy
CHIP Add16 { CHIP Add16 { IN a[16], b[16]; IN a[16], b[16]; George Boole CHIP FullAdder { CHIP FullAdder { OUT out[16]; OUT out[16]; 1815-1864 IN a, b, c; IN a, b, c; PARTS: PARTS:CHIP HalfAdder { CHIP HalfAdder { OUT sum, OUT sum, FullAdder(a=a[0],b=b[0],c=0, sum=out[1],carry=c0); FullAdder(a=a[0],b=b[0],c=0, sum=out[1],carry=c0); IN a, IN a, carry; b; carry; b; FullAdder(a=a[1],b=b[1],c=c0,sum=out[1],carry=c1); CHIP Xor { FullAdder(a=a[1],b=b[1],c=c0,sum=out[1],carry=c1); CHIP Xor { PARTS:OUT sum, PARTS:OUT sum, b; FullAdder(a=a[2],b=b[2],c=c1,sum=out[2],carry=c2); IN a, b; FullAdder(a=a[2],b=b[2],c=c1,sum=out[2],carry=c2); IN a, carry; carry; HalfAdder(a=a,b=b,sum=sum1,carry=carry1); CHIP And { HalfAdder(a=a,b=b,sum=sum1,carry=carry1); ... CHIP out; { OUT And ... OUT PARTS: out; PARTS:IN a, b; HalfAdder(a=c,b=sum1,sum=sum,carry=carry2); HalfAdder(a=c,b=sum1,sum=sum,carry=carry2); FullAdder(a=a[15],b=b[15],c=c14,sum=out[15]); IN PARTS: a, b; FullAdder(a=a[15],b=b[15],c=c14,sum=out[15]); PARTS: Not { Xor(a=a,b=b,out=sum); CHIP out; { Xor(a=a,b=b,out=sum); HalfAdder(a=carry1,b=carry2,sum=carry); CHIP out; OUT Not HalfAdder(a=carry1,b=carry2,sum=carry); } OUT Nand(a=a,b=b,out=AnandB); } Nand(a=a,b=b,out=AnandB); And(a=a,b=b,out=carry); IN in; And(a=a,b=b,out=carry); } IN PARTS: in; } PARTS: Nand { Or(a=a,b=b,out=AorB); CHIP Nand { Or(a=a,b=b,out=AorB); } CHIP out; OUT out; } OUT Not(in=x,out=out); Not(in=x,out=out); And(a=AnandB,b=AorB,out=out); IN And(a=AnandB,b=AorB,out=out); IN PARTS: a, b; PARTS: a, b; Nand(a=a,b=b,out=x); Nand(a=a,b=b,out=x); } OUT out; } OUT out; Nand(a=in,b=in,out=out); Nand(a=in,b=in,out=out); } } PARTS: PARTS: } } BUILTIN Nand; // Implemented by Nand.java BUILTIN Nand; // Implemented by Nand.java } }

Claude Shannon, 1916-2001
Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 20

Chip anatomy
RAM8.hdl

Simulator logic:
Top-down expansion Nand is primitive (built-in)

Register.hdl DMux8way.hdl Mux8way16.hdl

No Chip.hdl? Chip.java kicks in Instructors/architects can supply built-in versions of any chip.

Bit.hdl

Not.hdl And.hdl

Mux16.hdl

Benefits:
Mux.hdl DFD.hdl Mux.hdl

Behavioral simulation Chip GUI Order-free implementation Partial implementation is OK

Nand.java, Nand.java, Nand.java,

...

Nand.java

All HW projects are decoupled.

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 21

Hardware projects
hardware platform
machine language

Hardware projects: P1: Elementary logic gates

computer architecture

P5
ALU / CPU memory units

P2: Combinational gates (ALU) P3: Sequential gates (memory)
P3

P2
various combinational chips various sequential chips

P4: Machine language P5: Computer architecture

P1

essential theory (Boolean algebra and gate logic)

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 22

Project 2: Combinational chips

a b

h alf ad d er

s um c arry

a s um b c

16

a
16

fu ll ad d er

c arry

b

1 6 -b it ad d e r

16

o ut

zx nx

zy

ny

f

no

out(x, y, control bits) = x+y, x-y, y–x,

x
16 bits

0, 1, -1,

ALU

out
16 bits

x, y, -x, -y, x!, y!, x+1, y+1, x-1, y-1, x&y, x|y

y
16 bits

zr

ng

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 23

ALU logic

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 24

A glimpse ahead:

c1,c2,…,c6

D

D
a

A

A A/M
Mux

M RAM

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 25

ALU

out

Hardware projects
hardware platform
machine language

Hardware projects: P1: Elementary logic gates

computer architecture

P5
ALU / CPU memory units

P2: Combinational gates (ALU) P3: Sequential chips (memory)
P3

P2
various combinational chips various sequential chips

P4: Machine language P5: Computer architecture

P1

essential theory (Boolean algebra and gate logic)

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 26

Project 3: Sequential chips
RAM 64

RAM8

RAM 8
register

. . .

8

Register
Bit Bit

. . .
register Bit register

8

RAM8

...

...

DFF > Bit > Register > RAM8 > RAM64 > ... > RAM32K

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 27

Hardware projects
hardware platform
machine language

Hardware projects: P1: Elementary logic gates

computer architecture

P5
ALU / CPU memory units

P2: Combinational gates (ALU) P3: Sequential gates (memory)
P3

P2
various combinational chips

various sequential chips

P4: Machine language P5: Computer architecture

P1

essential theory (Boolean algebra and gate logic)

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 28

Machine Language: A-instruction @value @value

// A register = value // A register = value

Symbolic:

@value

// Where value is either a non-negative decimal number // or a symbol referring to such number. value (v = 0 or 1)

Binary:

0

v

v

v

v

v

v

v

v

v

v

v

v

v

v

v

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 29

Machine Language: C-instruction
dest = comp ; jump dest = comp ; jump comp is one of:
0,1,-1,D,A,!D,!A,-D,-A,D+1,A+1,D-1,A-1,D+A,D-A,A-D,D&A,D|A, 0,1,-1,D,A,!D,!A,-D,-A,D+1,A+1,D-1,A-1,D+A,D-A,A-D,D&A,D|A, M, M+1, M-1,D+M,D-M,M-D,D&M,D|M M, !M, !M, -M, -M, M+1, M-1,D+M,D-M,M-D,D&M,D|M
// If dest is null, the “=“ is ommitted // If dest is null, the “=“ is ommitted // If jump is null, the “;“ is ommitted // If jump is null, the “;“ is ommitted

dest is one of:
Null, M, D, MD, A, AM, AD, AMD Null, M, D, MD, A, AM, AD, AMD
A
D

c1,c2,…,c6

D
ALU

a

out

jump is one of:
Null, JGT, JEQ, JGE,JLT, JNE, JLE,JMP Null, JGT, JEQ, JGE,JLT, JNE, JLE,JMP

A

A/M

Mux

M RAM

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 30

Machine Language: C-instruction (cont.)
Symbolic: dest=comp;jump // Either the dest or jump fields may be empty. // If dest is empty, the "=" is ommitted; // If jump is empty, the ";" is omitted. comp Binary: 1 1 1
a c1 c2 c3 c4 c5 c6

dest
d1 d2

jump
d3 j1 j2 j3

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 31

Hardware projects
hardware platform
machine language

Hardware projects: P1: Elementary logic gates

computer architecture

P5
ALU / CPU memory units

P2: Combinational gates (ALU) P3: Sequential gates (memory)
P3

P2
various combinational chips

various sequential chips

P4: Machine language P5: Computer architecture

P1

essential theory (Boolean algebra and gate logic)

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 32

Project 5: CPU

ALU output

C C

C

D
decode
C C

D

C

A

A A/M

ALU

outM

Mux

C

instruction inM reset
reset

Mux
M A reset A

C

writeM addressM

C

PC

pc

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 33

Project 5: Computer
Many other computer models can be built.
inM writeM CPU Instruction Memory (ROM32K) instruction outM addressM pc (Memory) Data Memory

J. Von Neumann (1903-1957)

reset

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 34

Input / Output Devices
load

Data Memory
0x0000

in
16

RAM (16K)
0X3FFF 0x4000

out
16

address
15

0x5FFF 0x6000

screen memory map (8K) keyboard memory map

screen

Keyboard

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 35

Recap: the Hack chip-set and hardware platform
Elementary logic gates Combinational chips (Project 2): HalfAdder FullAdder Add16 Inc16 ALU Xor RAM512 Mux Dmux Not16 And16 Or16 Mux16 Or8Way Mux4Way16 Mux8Way16 DMux4Way DMux8Way
Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 36

Sequential chips

Computer Architecture

(Project 1):
Nand (primitive) Not And Or

(Project 3):
DFF (primitive) Bit Register RAM8 RAM64

(Project 5):
Memory CPU Computer

RAM4K RAM16K PC

Course map
hardware platform
machine language

Software hierarchy
operating system prog. language

computer architecture

compiler

ALU / CPU

memory units

stack machine

various combinational chips

various sequential chips

virtual machine

essential theory (Boolean algebra and gate logic)

assembly

assembler

machine language

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 37

Software projects
Software hierarchy
operating system P12 prog. language

P9

compiler

P10, 11

stack machine

virtual machine

P7, 8

assembly

assembler

P6

machine language

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 38

Project 6: Assembler
Sum.asm
// Computes sum=1+2+ … +100. // Computes sum=1+2+ … +100. @i // i=1 @i // i=1 M=1 M=1 @sum // sum=0 @sum // sum=0 M=0 M=0 (LOOP) (LOOP) @i // if i-100>0 goto END @i // if i-100>0 goto END D=M D=M @100 @100 D=D-A D=D-A @END @END D;jgt D;jgt @i // sum+=i @i // sum+=i D=M D=M @sum @sum M=D+M M=D+M @i // i++ @i // i++ M=M+1 M=M+1 @LOOP // goto LOOP @LOOP // goto LOOP 0;jmp 0;jmp (END) (END) @END @END 0;JMP 0;JMP

Sum.bin
0000000000010000 0000000000010000 1110111111001000 1110111111001000 0000000000010001 0000000000010001 1110101010001000 1110101010001000 0000000000010000 0000000000010000 1111110000010000 1111110000010000 0000000001100100 0000000001100100 1110010011010000 1110010011010000 0000000000010010 0000000000010010 1110001100000001 1110001100000001 0000000000010000 0000000000010000 1111110000010000 1111110000010000 0000000000010001 0000000000010001 1111000010001000 1111000010001000 0000000000010000 0000000000010000 1111110111001000 1111110111001000 0000000000000100 0000000000000100 1110101010000111 1110101010000111

Assembler

Ada Lovelace (1815-1852)

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 39

Assembler in action

Project 6: Build an assembler

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 40

CPU Emulator

instruction memory data memory

256 by 512 pixels simulated screen

keyboard enabler

Data register

program counter

address register

ALU

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 41

Software projects
Software hierarchy
operating system P12 prog. language

P9

compiler

P10, 11

stack machine

virtual machine

P7, 8

assembly

assembler

P6

machine language

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 42

The Big Picture
Some language

...

Some Other language

...

Jack language

Proj. 9: building an app. Proj. 12: building the OS

Some compiler

Some Other compiler

Jack compiler

Projects 10-11

VM language

VM implementation over CISC platforms

VM imp. over RISC platforms

VM emulator

VM imp. over the Hack platform

Projects 7-8

CISC machine language

RISC machine language

... ...

written in a high-level language

Hack machine language Projects 1-6

...
Any computer

CISC machine

RISC machine

other digital platforms, each equipped with its VM implementation

Hack computer
slide 43

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

The VM language
Arithmetic commands Arithmetic commands add add sub sub neg neg eq eq gt gt lt lt and and or or not not Memory access commands Memory access commands pop segment i i pop segment push segment i i push segment Program flow commands Program flow commands label label goto goto symbol symbol symbol symbol

if-goto symbol if-goto symbol Function calling commands Function calling commands function funcationName nLocals function funcationName nLocals call call return return functionName nArgs functionName nArgs

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 44

The VM abstraction: a Stack Machine
High-level code
function mult(x,y) { function mult(x,y) { int result, j; int result, j; result=0; result=0; j=y; j=y; while ~(j=0) { while ~(j=0) { result=result+x; result=result+x; j=j-1; j=j-1; } } return result; return result; } }

Stack machine code
function mult(x,y) function mult(x,y) push 0 push 0 pop result pop result push y push y pop j pop j label loop label loop push j push j push 0 push 0 eq eq if-goto end if-goto end push result push result push x push x add add pop result pop result push j push j push 1 push 1 sub sub pop j pop j goto loop goto loop label end label end push result push result return return

VM code
function mult 2 function mult 2 push push constant 0 constant 0 pop local 0 pop local 0 push argument 1 push argument 1 pop local 1 pop local 1 label loop label loop push push local 1 local 1 push push constant 0 constant 0 eq eq if-goto end if-goto end push push local 0 local 0 push push argument 0 argument 0 add add pop local 0 pop local 0 push local 1 push local 1 push constant 1 push constant 1 sub sub pop local 1 pop local 1 goto goto loop loop label end label end push local 0 push local 0 return return
slide 45

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

VM Emulator

virtual memory segments

default test script

global stack VM code

host RAM

working stack

(the RAM is not part of the VM)

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 46

Projects 7,8: Implement the VM over the Hack platform
Mult.vm
function mult 2 //// 2 local variables function mult 2 2 local variables push constant 0 //// result=0 push constant 0 result=0 pop local 0 pop local 0 push argument 1 //// j=y push argument 1 j=y pop local 1 pop local 1 label loop label loop push constant 0 //// if j==0 goto end push constant 0 if j==0 goto end push local 1 push local 1 eq eq if-goto end if-goto end push local 0 //// result=result+x push local 0 result=result+x push argument 0 push argument 0 add add pop local 0 VM pop local 0 push local 1 //// j=j-1 push local 1 j=j-1 push constant 1 push constant 1 sub sub pop local 1 pop local 1 goto loop goto loop label end label end push local 0 //// return result push local 0 return result return return

Mult.asm
... ... A=M-1 A=M-1 M=0 M=0 @5 @5 D=A D=A @LCL @LCL A=M-D A=M-D D=M D=M @R6 @R6 M=D M=D @SP @SP AM=M-1 AM=M-1 D=M D=M @ARG @ARG A=M A=M M=D M=D D=A D=A @SP @SP M=D+1 M=D+1 @LCL @LCL D=M D=M ... ...

Translator

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 47

Software projects
Software hierarchy
operating system prog. language

compiler

stack machine

virtual machine

assembly

assembler

machine language

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 48

Jack Language
class Math { class Math { /** Returns n! */ /** Returns n! */ function int factorial(int n){ function int factorial(int n){ if (n = 0) { if (n = 0) { return 1; return 1; } } else { else { return n * Math.factorial(n - 1); return n * Math.factorial(n - 1); } } } } /** Returns e=sigma(1/n!) where n goes from 0 to infinity */ /** Returns e=sigma(1/n!) where n goes from 0 to infinity */ function Fraction e (int n){ function Fraction e (int n){ var int i; var int i; let i = 0; let i = 0; let e = Fraction.new(0,1); // start with e=0 let e = Fraction.new(0,1); // start with e=0 // approximate up to n // approximate up to n while (i < n) { while (i < n) { let e = e.plus(Fraction.new(1, Math.factorial(i))); let e = e.plus(Fraction.new(1, Math.factorial(i))); let i = i + 1; let i = i + 1; } } return e; return e; } } ... ... } // end Math } // end Math
Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 49

Project 9: Write a Jack program

Demo Pong

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 50

Software projects
Software hierarchy
operating system prog. language

compiler

stack machine

virtual machine

assembly

assembler

machine language

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 51

Compiler project I: Syntax Analysis
Prog.jack (5+y)*2 – sqrt(x*4) (5+y)*2 – sqrt(x*4) Jack Grammar

*
+
2 sqrt

Syntax Analyzer

Prog.xml
5 <expression> <expression> <term> <term> <symbol> ( </symbol> <symbol> ( </symbol> <expression> <expression> <term> <term> <integerConstant> 5 </integerConstant> <integerConstant> 5 </integerConstant> </term> </term> <symbol> + </symbol> <symbol> + </symbol> <term> <term> <identifier> y </identifier > <identifier> y </identifier > </term> </term> ... ... </expression> </expression> y

Prog.vm
x

*
4

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 52

Compiler project II: Code Generation
Prog.jack (5+y)*2 – sqrt(x*4) (5+y)*2 – sqrt(x*4)

Syntax analyzer

Project 9
Prog.vm push 5 push 5 push y push y add add push 2 push 2 call mult call mult push x push x push 4 push 4 call mult call mult call sqrt call sqrt sub sub
slide 53

Project 10

*
+
5 y 2

sqrt

Code generator Prog.vm
x

*
4

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

Software projects
Software hierarchy
operating system prog. language

compiler

stack machine

virtual machine

assembly

assembler

machine language

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 54

Typical Jack code
/** Computes the average of a sequence of integers. */ /** Computes the average of a sequence of integers. */ class Main { class Main { function void main() { function void main() { var Array a; var Array a; var int length; var int length; var int i, sum; var int i, sum; let length = Keyboard.readInt(”How many numbers? ”); let length = Keyboard.readInt(”How many numbers? ”); let a = Array.new(length); // Constructs the array let a = Array.new(length); // Constructs the array let i = 0; let i = 0; while (i < length) { while (i < length) { let a[i] = Keyboard.readInt(”Enter the next number: ”); let a[i] = Keyboard.readInt(”Enter the next number: ”); let sum = sum + a[i]; let sum = sum + a[i]; let i = i + 1; let i = i + 1; } } do Output.printString(”The average is: ”); do Output.printString(”The average is: ”); do Output.printInt(sum / length); do Output.printInt(sum / length); do Output.println(); do Output.println(); return; return; } } } }
Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 55

OS Libraries
Math: String: Array: Output: Screen: Keyboard: Memory: Sys: Provides basic mathematical operations; Implements the String type and string-related operations; Implements the Array type and array-related operations; Handles text output to the screen; Handles graphic output to the screen; Handles user input from the keyboard; Handles memory operations; Provides some execution-related services.

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 56

OS API
Project 12:
class Math { class Math { Build it. function void init() function void init() Class String { Class String { function int abs(int x) function int abs(int x) constructor String new(int maxLength) constructor String new(int maxLength) function int multiply(int x, int y) function int multiply(int x, int y) Class Array { dispose() Class void method void { dispose() method Array function int divide(int x, int y) function int divide(int x, int y) method int length() function Array new(int method int length() y) functionfunction Arrayx,new(int size) function int min(int {x, int y) size) int min(int class Output { int j) class method charOutput method char charAt(int j) charAt(int function int max(int x, int y) function int max(int x, int y) function void moveCursor(int c) int j) method void dispose() function dispose() i, method void void void moveCursor(int i, int j) method void setCharAt(int j, char c) functionmethodsqrt(int x) { sqrt(int x) function intClass Screen printChar(char c) intClass setCharAt(int j, char functionScreen printChar(char c) function void { void method String appendChar(char c) method String appendChar(char c) } } function void clearScreen() s) } } function void clearScreen() s) function void printString(String function void printString(String method void class Memory { eraseLastChar() method voidfunctionMemory setColor(boolean b) eraseLastChar() class void setColor(boolean b) { function printInt(int i) function void void function void printInt(int i) method int intValue() method int function void drawPixel(int x, int y) intValue() function println() function function int peek(int address) y) function drawPixel(int x, int function void voidj) peek(int address) void Keyboard method void setInt(int int Class println() { method voidfunction void drawLine(int x1, int y1, setInt(int j) Class Keyboard function backSpace(){ function void void drawLine(int x1, int y1, void backSpace() int address, int functionfunctionfunction void poke(int x2, int y2) value) char backSpace() function char backSpace()void poke(int x2, int y2) value) int address, int function function char keyPressed() } function } function char doubleQuote() char keyPressed() int y1, function void drawRectangle(int x1, int y1, function char doubleQuote() Class Sys { function Class drawRectangle(int x1, void Sys { function Array alloc(intint x2, int y2) size) function size) function char newLine() Array alloc(intint x2, int y2) function char readChar() function char newLine() function charvoid halt(): readChar() function function voidfunction void halt(): y, int r) drawCircle(int x, int } function voidvoid deAlloc(Array int y, int r) drawCircle(int x, function void deAlloc(Array o) } function o) function String readLine(String message) } function String readLine(String message) } function void error(int errorCode) function void error(int errorCode) } } function int readInt(String message) function int void wait(int duration) message) function readInt(String duration) function void wait(int } } } }

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 57

Recap
ALU output

C C

C

D
decode
C C

D

C

ALU

outM

Nand

HW

A

A A/M

C

instruction inM reset
reset

SW
writeM addressM

Mux

Mux
M A reset A

C

F al se

C

PC

pc

application (e.g. Pong) high-level language / OS virtual machine assembly machine language architecture chip-set logic

15 obj-oriented bat / ball operations 250 lines of Jack code 1000 lines of VM code 4,000 lines of Assembly 30,000 lines of Hack code 500,000 bits 2,000,000 logic gates 1 God

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 58

God gave us 0 and Nand

Nand

F al se

Everything else was done by humans.
Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 59

Why the approach works
Take home Initial goal: Acquire enough hands-on knowledge for building a computer system Final lesson: This includes some of the most beautiful topics in applied CS Occam razor No optimization No advanced features No exceptions Highly-Managed Detailed API’s are given Hundreds of test files and programs Modular projects, unit-testing.
Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview slide 60

Abstraction–Implementation Paradigm
Human Thought Abstract design
abstract interface

P9, P12

H.L. Language & Operating Sys.

Compiler
abstract interface

Software hierarchy
Virtual Machine VM Translator
abstract interface

P10, P11

P7, P8 Assembly Language

Assembler P6
abstract interface

Machine Language

Computer Architecture
abstract interface

Hardware platform
Gate Logic
abstract interface

P4, P5 Hardware Platform

P1, P2, P3 Chips & Logic Gates

Electrical Engineering Physics

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 61

Course / book site

www.idc.ac.il/tecs

Elements of Computing Systems, Nisan & Schocken, MIT Press, 2005, www.idc.ac.il/tecs , book and course overview

slide 62

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